Hi,
I am trying to set the register CAN_IP_MUX21 to configure the message object interrupts on Interrupt line 1.
This register has 32 bits which are mapped to 32 message object. Here I am seeing one weird behavior. Bit 0 is setting the interrupt line for message object 32 and bit 1 is setting interrupt line for message object 1. Is this behavior is expected or I am doing something wrong?
If this is an expected behavior, is this behavior is there for all message object related registers (for example CAN_TXRQ_21)?
Thanks in advance,
Sumith