F28335 epwm immediate mode

Hi,

Since you have configured immediate mode for compare value loading - if the value written to the compare register is smaller than the current time base counter value, compare event for the cycle is missed.
Timing of the update of compare register and the value become critical.
You can check/fix this by reading TBCNT to check the status of the counter before updating the compare value.
If the current counter value, at the time of update, is bigger than the compare value to be updated it could result in this behavior.

-Bharathi.

Also, it's not very clear what you meant by "my pwm limit compared value is 4095".
Can you share the PWM configuration? what is the period and compare values? Are you updating compare value in an ISR?
But, the above experiment should tell you if there is issue with timing of the compare value update.

-Bharathi.

Hi,

I faced similar type of problem. Normally it is suggested to use shadow mode to load the compare registers. However, loading the compare register through shadow mode will not give proper results if the switching frequency is very low especially in case of multilevel inverter, where individual switching frequency is very low.

In my application, there are three H-bridge inverters for each phase. Therefore three ePWM modules are used with carrier frequency of 450 Hz. Now if we use shadow mode with this low frequency there will be substantial error in the PWM output.

I tried with the immediate mode of the ePWM module and updating the compare registers through ISR of 200 microseconds. The ePWM module misbehaves especially when the compare register value is near about counter value (TBCNT) at the instance of update.

One of the suggestion to resolve this is to check counter value (TBCNT) before upload the compare value. However it will consume considerable amount of processor time as I have total 18 compare values (9 ePWM modules with compare A and compare B). I am using F28377D which has 12 Type 4 ePWM modules.

-Shambhu

Hi Mr Bharathi,

Thanks for your suggestion.

If I understood correctly, then I have to assign some values to the CMPC and CMPD regularly, based on which, events will be triggered. In each event the CMPA and CMPB registers can be updated. Though these will eliminate the checking of TBCNT, but these requires calculation of proper CMPC and CMPD values and update these registers, which may be more time consuming . I hope the calculation for the CMPC and CMPD values will be different during carrier up and down mode of operation. If I am wrong, would you please explain how to calculate appropriate time for interrupt generation.

I need total 18 ePWM signals and therefore using 9 ePWM modules with up-down mode for different values of CMPA and CMPB registers.


Thanks
Shambhu

Hi Shambhu,

Yes. You can use either CMPC or CMPD for interrupt generation. Use this ISR to load CMPA/B values. You don't have to calculate CMPC/D all the time. Right? Just set it to a value which gives enough time for you to update all the 9 CMPA/B registers and other things you've to do before the reg update. You can measure the time needed and set CMPC or D accordingly during development. Time needed for your code execution can be measured during development using a profiler or timer or simple toggle a GPIO and measure on scope.

-Bharathi.

Hi Mr Bharathi,

We are using an CPU timer 1 ISR to update of CMPA and CMPB registers. Would we get any additional benefit of using event generated by CMPC/CMPD event over CPU timer 1 ISR?

-Shambhu

Shambhu,

Advantage with CMPC/D is that the events remains in sync with the rest of the PWM generation - which will not be the case with CPU Timer.
In case of any time base changes due to sync operation or resetting the PWM etc. - CMPC/D events also have same effect unlike CPU timer event.
Also, CPU timer can then be used for other purposes.

-Bharathi