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Reading Piccolo ADCs using CLA and ONESHOT mode

Stephen Love
Prodigy 20 points
Other Parts Discussed in Thread: TMS320F28069

Hi All

Using a TMS320F28069 we need to sample one ADC at 1us intervals and 6 others with more relaxed timing. Time is tight so we are executing the processing code for the main ADC in a CLA routine. The ADC is triggered from a PWM and generates ADCINT1. It is critical that the main ADC interrupt is processed at the 1us intervals.

There isn't time for all of the other 6 ADCs to complete their conversion in the 1us interval so we have tried to set up the other 6 ADCs in a round robin scheme by triggering them all off ADCINT1 and setting ONESHOT mode. However, it seems that all the ADC conversion are happening even though we have set ONESHOT mode. This delays the main, high priority interrupt since it can occur whilst another channel is being converted.

We have to enable continuous mode because you cannot clear an interrupt from within a CLA routine.

We are currently implementing the round robin processing by manually triggering the ADCs from a CPU based interrupt routine which works OK but we need the processor cycles in the main CPU as well.

We also tried not enabling continuous mode but clearing the interrupt in the CPU interrupt routine but this didn't seem to help.

Can anybody tell me if this should work?

Thanks

Steve Love

  • 0
    TI__Guru* 82120 points

    Stephen,

    This should work, but the timings will be tight, in terms of when your high priority SOCs need to come in to "block" the round robin/ONESHOT enabled SOCs since they are going to re-trigger off one another.  I think that is why it looks like all of them are triggering even though ONESHOT is enabled.

    Can you check the state of the INTPULSEPOS bit in the ADCCTL1 register(bit 2).  From reset this is set to 0, which generates the INT after the sample is complete.  For the above let's change this to a "1" which will drive the INT after the conversion is complete and the value is latched.  This should buy the high priority triggers more time to intercept the converter.

    Let me know if this helps, or if this is already a "1" we can look at other methods to get your system how you want it.

    Best regards,

    Matthew

  • 0 in reply to MatthewPate
    Prodigy 20 points

    Hi Matthew

    Thanks for responding.

    We weren't setting INTPULSEPOS but setting it doesn't seem to help.

    To give you a bit more detail:

    ADC clock is running at 45MHz

    ADCCTL1 = 0x42ED            INTPULSEPOS, powered, ADC enabled
    ADCCTL2 = 0x0003             ADC Clock = CPU Clock/2, non-overlap

    We are using ADC4 as the main (1 us) ADC controlled by SOC0 and generating ADCINT1 so:

    ADCSOC0CTL = 0x2909       ePWM1, ADCSOCA, ADCINA4, 10 cycles
    INTSEL1N2 = 0x6160           INT2 Continuous, enabled, EOC1 - INT1 Continuous, enabled, EOC0
    SOCPRICTL = 0x8041         ONEHSOT, SOC0 high priority, SOC2-SOC15 round robin

    All other INTSEL registers are 0x0000

    ADCSAMPLEMODE  = 0x0002      SOC2 & SOC3 in simultaneous mode

    ADCINTSOCSEL1 = 0x1514          SOC1 = ADINT1, SOC2 = ADCINT1, SOC4 = ADINT1, SOC5 = ADCINT1, SOC6 = ASCINT1
    ADCINTSOCSEL2 = 0x0000

    ADCSOC1CTL 0x1218          ADCINB0, 25 cycles
    ADCSOC2CTL 0x1098          ADCINA2/ADCINB2, 25 cycles
    ADCSOC3CTL 0x0000
    ADCSOC4CTL 0x1058          ADCINA1, 25 cycles
    ADCSOC5CTL 0x1258          ADCINB1, 25 cycles
    ADCSOC6CTL 0x1159          ADCINA5, 26 cycles

    ADCINT1 is being handled by a CLA routine and ADCINT2 indicates when all conversion are complete and is handled by the CPU. This means that the CPU routine should be running every 5 ADCINT1 interrupts but we observe that the CPU routine runs every ADCINT1 suggesting that all the conversion in the round robin schedule are running every ADCINT1.

    Any thoughts on what is going wrong?

    Thanks

    Steve Love