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CLA Resolver Library problem

Genius 5910 points

Other Parts Discussed in Thread: CONTROLSUITE

Hi,

I want to use the CLA resolver library with the F28069M.

 I started with this example: C:\ti\controlSUITE\development_kits\TMDSRSLVR_v1.0\Resolver_f28035_CLA

The problem is that   resolver_algo_CLA (); produce any output.  I know for sure that is is called.  So for a calculation it is very odd that there is no output.  There is no write to any variables.

 I see the ADC values in rslvrOut.sin_input and rslvrOut.cos_input. So the adc is sampled and the struct on the right location. I see my configure variables in rslvrIn so that is on the correct memory location.

I did ready any documentation I found.  At the moment I'm out of ideas.

Please have a look to see if you can suggest a problem.

 
 
Input signal.

CLA code:

__interrupt void Cla1Task8 ( void )
{
    CLA_COUNTER=0;
    init_resolver_CLA ();
}

__interrupt void Cla1Task2 ( void )
{

    CLA_ADCRESULT[8]=(unsigned short)*(adcmemory +8);    // Resolver sin
    CLA_ADCRESULT[9]=(unsigned short)*(adcmemory +9);    // Resolver cos

    rslvrOut.sin_input = ((float)(CLA_ADCRESULT[8])*(3.3/4096)) - rslvrIn.offsetS;
    rslvrOut.cos_input = ((float)(CLA_ADCRESULT[9])*(3.3/4096)) - rslvrIn.offsetC;
    resolver_algo_CLA ();
}

Task2 is called at 160khz when the ADC is ready. Task8 is called at CLA_init

Init CLA: 

void CLA_init (HAL_Handle handle)
{
    HAL_Obj *obj = (HAL_Obj *)handle;
    PIE_Obj *pie = (PIE_Obj *)obj->pieHandle;

    adcmemory=(unsigned short *)(handle->adcHandle);
    ENABLE_PROTECTED_REGISTER_WRITE_MODE;
    // Assign CLA ISR
    pie->CLA1_INT1 = &cla1_task1_isr;
    pie->CLA1_INT2 = &cla1_task2_isr;
    pie->CLA1_INT3 = &cla1_task3_isr;
    pie->CLA1_INT4 = &cla1_task4_isr;
    pie->CLA1_INT5 = &cla1_task5_isr;
    pie->CLA1_INT6 = &cla1_task6_isr;
    pie->CLA1_INT7 = &cla1_task7_isr;
    pie->CLA1_INT8 = &cla1_task8_isr;
    DISABLE_PROTECTED_REGISTER_WRITE_MODE;
#ifdef FLASH
    //Copy over the CLA code(if running in standalone mode from FLASH)
    memCopy((uint16_t *) &Cla1funcsRunStart, (uint16_t *) &Cla1funcsLoadStart,
            (uint16_t *) &Cla1funcsLoadSize);
    // Copy CLA code from flash to RAM
    // Copy CLA math tabes from flash to RAM
    memCopy(&Cla1mathTablesRunStart, &Cla1mathTablesLoadStart, (uint16_t *)&Cla1mathTablesLoadSize);
#endif
    CLK_enableClaClock (obj->clkHandle);

    /*  Step 3 : Mapping CLA tasks
    *  Map CLA program memory to the CLA and enable software breakpoints
    */

    ENABLE_PROTECTED_REGISTER_WRITE_MODE;
   Cla1Regs.MVECT1 = (uint16_t)((uint32_t)&Cla1Task1 -(uint32_t)&Cla1Prog_Start);
   Cla1Regs.MVECT2 = (uint16_t)((uint32_t)&Cla1Task2 -(uint32_t)&Cla1Prog_Start);
   Cla1Regs.MVECT3 = (uint16_t)((uint32_t)&Cla1Task3 -(uint32_t)&Cla1Prog_Start);
   Cla1Regs.MVECT4 = (uint16_t)((uint32_t)&Cla1Task4 -(uint32_t)&Cla1Prog_Start);
   Cla1Regs.MVECT5 = (uint16_t)((uint32_t)&Cla1Task5 -(uint32_t)&Cla1Prog_Start);
   Cla1Regs.MVECT6 = (uint16_t)((uint32_t)&Cla1Task6 -(uint32_t)&Cla1Prog_Start);
   Cla1Regs.MVECT7 = (uint16_t)((uint32_t)&Cla1Task7 -(uint32_t)&Cla1Prog_Start);
   Cla1Regs.MVECT8 = (uint16_t)((uint32_t)&Cla1Task8 -(uint32_t)&Cla1Prog_Start);
    DISABLE_PROTECTED_REGISTER_WRITE_MODE;
   ENABLE_PROTECTED_REGISTER_WRITE_MODE;

   Cla1Regs.MPISRCSEL1.bit.PERINT1SEL     = CLA_INT1_NONE;
   Cla1Regs.MPISRCSEL1.bit.PERINT2SEL     = CLA_INT2_ADCINT2;            // See Hal.c L840
   Cla1Regs.MPISRCSEL1.bit.PERINT3SEL     = CLA_INT3_NONE;
   Cla1Regs.MPISRCSEL1.bit.PERINT4SEL     = CLA_INT4_NONE;
   Cla1Regs.MPISRCSEL1.bit.PERINT5SEL     = CLA_INT5_NONE;
   Cla1Regs.MPISRCSEL1.bit.PERINT6SEL     = CLA_INT6_NONE;
   Cla1Regs.MPISRCSEL1.bit.PERINT7SEL     = CLA_INT7_NONE;
   Cla1Regs.MPISRCSEL1.bit.PERINT8SEL     = CLA_INT8_NONE;

       Cla1Regs.MICLROVF.all=0xFF;    // Clear all Overflow bits. Task 1 - 8.
    Cla1Regs.MMEMCFG.bit.PROGE = 1;
    Cla1Regs.MMEMCFG.bit.RAM0E = 1;
    Cla1Regs.MMEMCFG.bit.RAM1E = 1;
    Cla1Regs.MMEMCFG.bit .RAM0CPUE=1;
    Cla1Regs.MMEMCFG.bit .RAM1CPUE=1;
    Cla1Regs.MCTL.bit.IACKE = 1;
    Cla1Regs.MIER.all                      =     M_INT8;     // Enable Task 8
    DISABLE_PROTECTED_REGISTER_WRITE_MODE;
    Cla1ForceTask8andWait ();    // Run Task 8 Init CLA resolver

    ENABLE_PROTECTED_REGISTER_WRITE_MODE;
    Cla1Regs.MIER.all                      =     M_INT2;     // Enable Task 2
    DISABLE_PROTECTED_REGISTER_WRITE_MODE;
}

Init resolver:

void Resolver_init (void)
{
    rslvrIn.SAMPLING_TIME = 1.0 / SAMPLING_FREQ;
    rslvrIn.TABLE_LENGTH  =  DELAY_LENGTH;
    rslvrIn.TUNING        = TUNING_SEL;
    rslvrIn.FIR32         = FIR32_SEL;
    rslvrIn.testAngle     = 0.0;
    rslvrIn.rpsMax        = 200.0;    // max motor speed in freq
    rslvrIn.firLag        = 3;        // fbk sine and cosine peaks occur when firLag = 3

    float offsetFc = 500.0 / TWO_PI;        // offset filter corner frequency (Hz)
    float errorFc  = 1000.0;                // error filter corner frequency (Hz)
    float piconFz  = 200.0;                 // pi controller - ZERO frequency
    float Kp = 5000.0;                 // pi controller - prop gain

    rslvrIn.errorWfT  =  errorFc  * TWO_PI * rslvrIn.SAMPLING_TIME;

    float kiTsBy2   =  Kp * (piconFz * TWO_PI) * rslvrIn.SAMPLING_TIME / 2.0;
    rslvrIn.picon_K0  =  Kp + kiTsBy2;
    rslvrIn.picon_K1  = -Kp + kiTsBy2;
    rslvrIn.offsetS   = 0;
    rslvrIn.offsetC   = 0;

}

I didn't find any documentation on how to use the library. so no idea what   resolver_algo_CLA  expect as input.

 Hope you can help.

  • F28069 is a floating point CPU, and therefore you should use

    'Resolver_Lib_CLA_float.lib'

    You can find this at "C:\TI\controlSUITE\libs\app_libs\motor_control\libs\resolver\v100\lib"

    rgds,

    ramesh

  • Ramesh Ramamoorthy said:

    F28069 is a floating point CPU, and therefore you should use

    'Resolver_Lib_CLA_float.lib'

    You can find this at "C:\TI\controlSUITE\libs\app_libs\motor_control\libs\resolver\v100\lib"

    rgds,

    ramesh

    Thanks, I already did that. More suggestions?

    Can you please explain me the variable  rslvrOut.sineIndex and is it mandatory?

    This is the Disassembly of the resolver_algo_CLA call. maybe is it useful. It is not very readable.

     0x1500 is rslvrIn 

    0x1480  is  rslvrOut. 

    0x9C00 is CLAatan2Table 

    0x8C40 is firCoeff.               (pointing to the FIR  table)

    00009000:   74F09BEA    MMOV32     @0x9bea, MR3
    00009002:   75801500    MMOVZ16    MR0, @0x1500
    00009004:   75901494    MMOVZ16    MR1, @0x1494
    00009006:   7BC0003C    MLSL32     MR0, 16
    00009008:   7BC0003D    MLSL32     MR1, 16
    0000900a:   7B80003C    MLSR32     MR0, 16
    0000900c:   7B80003D    MLSR32     MR1, 16
    0000900e:   7CC00004    MADD32     MR0, MR1, MR0
    00009010:   78410000    MMOVIZ     MR1, #0x0
    00009012:   7881000F    MMOVXI     MR1, #0xf
    00009014:   7C600004    MAND32     MR0, MR1, MR0
    00009016:   75C09D86    MMOV16     @0x9d86, MR0
    00009018:   75909D90    MMOVZ16    MR1, @0x9d90
    0000901a:   75D09BEC    MMOV16     @0x9bec, MR1
    0000901c:   7AC000F2    MMOV32     MR2, MR0, UNCF
    0000901e:   7BC00002    MLSL32     MR2, 1
    00009020:   73D09BEC    MMOV32     MR1, @0x9bec, UNCF
    00009022:   7CC00025    MADD32     MR1, MR1, MR2
    00009024:   7FD10000    MMOV16     MAR0, MR1, #0x0
    00009026:   7FA00000    MNOP       
    00009028:   7FA00000    MNOP       
    0000902a:   73E01490    MMOV32     MR2, @0x1490, UNCF
    0000902c:   73D10000    MMOV32     MR1, *MAR0, UNCF
    0000902e:   74E09BF6    MMOV32     @0x9bf6, MR2
    00009030:   7FA00000    MNOP       
    00009032:   7FA00000    MNOP       
    00009034:   73F09BF6    MMOV32     MR3, @0x9bf6, UNCF
    00009036:   0DE09D8A    MMPYF32    MR3, MR1, MR3 || MMOV32    MR2, @0x9d8a
    00009038:   7C20002E    MADDF32    MR2, MR3, MR2
    0000903a:   74E09D8A    MMOV32     @0x9d8a, MR2
    0000903c:   74E09BFA    MMOV32     @0x9bfa, MR2
    0000903e:   73E01492    MMOV32     MR2, @0x1492, UNCF
    00009040:   74E09BF4    MMOV32     @0x9bf4, MR2
    00009042:   7FA00000    MNOP       
    00009044:   7FA00000    MNOP       
    00009046:   73F09BF4    MMOV32     MR3, @0x9bf4, UNCF
    00009048:   0DE09D8C    MMPYF32    MR3, MR1, MR3 || MMOV32    MR2, @0x9d8c
    0000904a:   7C20002E    MADDF32    MR2, MR3, MR2
    0000904c:   74E09D8C    MMOV32     @0x9d8c, MR2
    0000904e:   74E09BF8    MMOV32     @0x9bf8, MR2
    00009050:   75A01501    MMOVZ16    MR2, @0x1501
    00009052:   74E09BF2    MMOV32     @0x9bf2, MR2
    00009054:   7BC0003E    MLSL32     MR2, 16
    00009056:   74E09BF2    MMOV32     @0x9bf2, MR2
    00009058:   7B80003E    MLSR32     MR2, 16
    0000905a:   74E09BF2    MMOV32     @0x9bf2, MR2
    0000905c:   7FA00000    MNOP       
    0000905e:   78420000    MMOVIZ     MR2, #0x0
    00009060:   73F09BF2    MMOV32     MR3, @0x9bf2, UNCF
    00009062:   7F20000E    MCMP32     MR2, MR3
    00009064:   7FA00000    MNOP       
    00009066:   7FA00000    MNOP       
    00009068:   7FA00000    MNOP       
    0000906a:   79800012    MBCNDD     0x12, NEQ
    0000906c:   7FA00000    MNOP       
    0000906e:   7FA00000    MNOP       
    00009070:   7FA00000    MNOP       
    00009072:   74D09D8E    MMOV32     @0x9d8e, MR1
    00009074:   798E002C    MBCNDD     0x2c, UNC
    00009076:   7FA00000    MNOP       
    00009078:   7FA00000    MNOP      

    <Jump>

    000090a0:   78410000    MMOVIZ     MR1, #0x0
    000090a2:   7F200001    MCMP32     MR1, MR0
    000090a4:   7FA00000    MNOP       
    000090a6:   7FA00000    MNOP       
    000090a8:   7FA00000    MNOP       
    000090aa:   79810010    MBCNDD     0x10, EQ
    000090ac:   7FA00000    MNOP       
    000090ae:   7FA00000    MNOP       
    000090b0:   7FA00000    MNOP       
    000090b2:   798E0282    MBCNDD     0x282, UNC
    000090b4:   7FA00000    MNOP       
    000090b6:   7FA00000    MNOP      

    <Jump>

    00009334:   73F09BEA    MMOV32     MR3, @0x9bea, UNCF
    00009336:   79AF0000    MRCNDD     UNCF
    00009338:   7FA00000    MNOP       
    0000933a:   7FA00000    MNOP       
    0000933c:   7FA00000    MNOP   

    <Return>

    Without the source code it is impossible to debug what the problem is.

  • Did you try evaluating using the CPU, did it work?

  • No, I didn't . I will try that, thanks.

    I did had some trouble with the CLA memory locations in the .CMD file.

    To verify that the problem is not in thr CLAmath.I did the following test.

    __interrupt void Cla1Task2 ( void )
    {
    rslvrOut.sin_input = ((float)(CLA_ADCRESULT[8])*(3.3/4096)) - rslvrIn.offsetS;
    rslvrOut.cos_input = ((float)(CLA_ADCRESULT[9])*(3.3/4096)) - rslvrIn.offsetC;
    CLA_ATANRESULT = CLAatan2(rslvrOut.sin_input , rslvrOut.cos_input);
    resolver_algo_CLA ();
    }

    I got results from CLA_ATANRESULT .

    Can you please tell me if there any other variables then rslvrIn and rslvrOut that resolver_algo_CLA expect?

    Thanks!
  • The Arc tan tables shouldnt be in RAML3 (currently at 0x9C00), thats the CLA program RAM, it needs to be in either RAML0,1,2 and you need to make sure that the CLA is given ownership of the RAM after you memcpy the tables from flash to RAM at startup.
  • Thanks.

    I don't think that is very clear in the documentation. Unfortunately resolver_algo_CLA (); still doesn't work. Any still can't find out why.
  • So are you getting the correct values for CLA_ATANRESULT . What about rslvrOut.angleRaw? where is rslvrOut in memory?
  • To verify that Atan works correctly
    I changed tast2 to this:
    __interrupt void Cla1Task2 ( void )
    {

    CLA_ADCRESULT[8]=(unsigned short)*(adcmemory +8); // Resolver sin
    CLA_ADCRESULT[9]=(unsigned short)*(adcmemory +9); // Resolver cos

    rslvrOut.sin_input = ((float)(CLA_ADCRESULT[8])*(3.3/4096)) - rslvrIn.offsetS;
    rslvrOut.cos_input = ((float)(CLA_ADCRESULT[9])*(3.3/4096)) - rslvrIn.offsetC;
    CLA_ATANRESULT = CLAatan2(-0.04945372, -0.9951087);
    resolver_algo_CLA ();
    }

    Result of CLA_ATANRESULT is -3.091937
    Address of:
    rslvrOut is 0x1480
    rslvrIn is 0x1500
    If I change rslvrOut .angleRaw to 0 or -1 in the debugger window the value is not updated with an other value.
    sin_input and cos_input are constant updated in the debug window.

    I verified that sin/cos input doesn't clip in the ADC range.
  • Ok so the tables are in accessible memory so it must be that resolver_algo_CLA() is not executing. Can you check the map file, search for the function and tell me where it has been placed in memory?

  • resolver_algo_CLA is place at memory location 0x9000 and init_resolver_CLA at 0x933E
  • Strange thinks are happening at CLAmath.
    I made a ISR that calculate the angle at the top of the signal. So the calculation is made at the same place in the signal. Resolver is static.

    rslvrOut.cos_input = -1.480005
    rslvrOut.sin_input = 0.4108886

    CLA_ATANRESULT[0] = CLAatan2(rslvrOut.cos_input , rslvrOut.sin_input);
    Result in : CLA_ATANRESULT[0] =-5.207371e+17.
    I expect something like 1.3. So that is odd.

    Table locations:
    CLAatan2Table void * 0x00008C06
    CLAatan2HalfPITable void * 0x00008C00
    CLAatan2TableEnd void * 0x00008D8C
    CLAINV2PI void * 0x00008C04
    I think that is correct.

    I'm using version of CLAMATH v4_00_01_00


    any suggestions?

    Edit: Location CLAatan2 is 0x94B6


    Edit2: I played with the CLAscratch memory location and the Atan2 function started working.  I really don't understand how and why.

     

  • the atan2 function stores some variables in the CLAscratch memory. The CLAScratch needs to be in a RAM (L0,1,2) that the CLA has access to. you might have either put it in RAML3 or in one of the other rams bu not configure the CLA (using MMEMCFG) to take control of that RAM.
  • I'm pretty sure that I messed up the memory allocation. Because I started where I left  Friday and my Atan doesn't work anymore.

    The problem is I don't have a clue what i did wrong. Or how to debug it. Can I have a CLA stack overflow. How do I check for that?

    Can you please have a look at my CMD file. and It there any documentation or configuration tool for this. CLA memory is also not shown at the memory allocation.

    At the CLA_init I do the mem copy. I run from flash because my program is to big.

    ------------------------------------------------------------------------------------

    _Cla1Prog_Start = _Cla1funcsRunStart;


     CLA_SCRATCHPAD_SIZE = 0x100;
    --undef_sym=__cla_scratchpad_end
    --undef_sym=__cla_scratchpad_start
    MEMORY
    {
    PAGE 0 :   /* Program Memory */
               /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
      RAML0       : origin = 0x008000, length = 0x000C00     /* on-chip RAM block L0 */
      CLARAM0     : origin = 0x009000, length = 0x000EFF
       OTP         : origin = 0x3D7800, length = 0x000400     /* on-chip OTP */

       FLASHD       : origin = 0x3D8000, length = 0x004000     /* on-chip FLASH */
       EEPROM      : origin = 0x3DC000, length = 0x004000     /* on-chip FLASH */
       FLASHA_B    : origin = 0x3E0000, length = 0x015F80   /* on-chip FLASH */

       CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
       BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
       CSM_PWL_P0  : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */

       FPUTABLES   : origin = 0x3FD590, length = 0x0006A0     /* FPU Tables in Boot ROM */
       IQTABLES    : origin = 0x3FDC30, length = 0x000B50    /* IQ Math Tables in Boot ROM */
       IQTABLES2   : origin = 0x3FE780, length = 0x00008C    /* IQ Math Tables in Boot ROM */
       IQTABLES3   : origin = 0x3FE80C, length = 0x0000AA     /* IQ Math Tables in Boot ROM */

       ROM         : origin = 0x3FF3B0, length = 0x000C10     /* Boot ROM */
       RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
       VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */

    PAGE 1 :   /* Data Memory */
               /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
               /* Registers remain on PAGE1                                                  */

       BOOT_RSVD   : origin = 0x000000, length = 0x000050     /* Part of M0, BOOT rom will use this for stack */
       RAMM0       : origin = 0x000050, length = 0x000400     /* on-chip RAM block M0 */
       RAML3            : origin = 0x009E00, length = 0x0100
       RAML4       : origin = 0x00A000, length = 0x002000     /* on-chip RAM block L4 */
       RAML5_6     : origin = 0x00C000, length = 0x004000     /* on-chip RAM block L5 */
       RAML7       : origin = 0x010000, length = 0x002000     /* on-chip RAM block L7 */
       RAML8       : origin = 0x012000, length = 0x001800     /* on-chip RAM block L8 */
       USB_RAM     : origin = 0x040000, length = 0x000800     /* USB RAM          */
       CLARAM0              : origin = 0x008800, length = 0x000400
       CLARAM1              : origin = 0x008C00, length = 0x000400
        FLASTABLES       : origin = 0x3F5F80, length = 0x002000
       CLA1_MSGRAMLOW       : origin = 0x001480, length = 0x000080
       CLA1_MSGRAMHIGH      : origin = 0x001500, length = 0x000080
    }



    SECTIONS
    {

       /* Allocate program areas: */
       .cinit              : > FLASHA_B,   PAGE = 0
       .pinit              : > FLASHA_B,   PAGE = 0
       .text               : > FLASHA_B,   PAGE = 0
       .cio               : > FLASHA_B,   PAGE = 0
       codestart           : > BEGIN,      PAGE = 0
       ramfuncs            : LOAD = FLASHD,
                             RUN = RAML0,
                             LOAD_START(_RamfuncsLoadStart),
                             LOAD_END(_RamfuncsLoadEnd),
                             RUN_START(_RamfuncsRunStart),
                             PAGE = 0

       csmpasswds          : > CSM_PWL_P0, PAGE = 0
       csm_rsvd            : > CSM_RSVD,   PAGE = 0

       /* Allocate uninitalized data sections: */
       .stack              : > RAML4,      PAGE = 1
       .sysmem            : > RAML8,    PAGE = 1
       .ebss               : > RAML5_6,    PAGE = 1
       .esysmem            : > RAML7,    PAGE = 1
       .bss_cla          : > RAML3,      PAGE = 1
       .const_cla        : > RAML3,      PAGE = 1
       IQmathTablesRam     : > RAML5_6,    PAGE = 1


       /* Initalized sections to go in Flash */
       /* For SDFlash to program these, they must be allocated to page 0 */
       .econst             : > FLASHD,   PAGE = 0
       .switch             : > FLASHA_B,   PAGE = 0

       /* Allocate IQ math areas: */
       IQmath              : > FLASHA_B,   PAGE = 0            /* Math Code */
       IQmathTables        : > IQTABLES,   PAGE = 0 , TYPE = NOLOAD

       /* Allocate FPU math areas: */
       FPUmathTables       : > FPUTABLES,  PAGE = 0 , TYPE = NOLOAD


     Cla1Prog        : > CLARAM0,
                         LOAD_START(_Cla1funcsLoadStart),
                         LOAD_END(_Cla1funcsLoadEnd),
                         LOAD_SIZE(_Cla1funcsLoadSize),
                         RUN_START(_Cla1funcsRunStart),
                         PAGE = 0

       Cla1ToCpuMsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1
       CpuToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1

       Cla1DataRam0        : > CLARAM0,          PAGE = 1
       Cla1DataRam1        : > CLARAM1,          PAGE = 1


        CLAscratch      :
                      { *.obj(CLAscratch)
                        . += CLA_SCRATCHPAD_SIZE;
                        *.obj(CLAscratch_end)
                        *<*.obj>(CLAscratch_end)
                        } > CLARAM1,
                        PAGE = 1

       CLA1mathTables    : LOAD = FLASTABLES, /* Note for running from RAM the load and RUN can be the same */
                          RUN = CLARAM1,
                          LOAD_START(_Cla1mathTablesLoadStart),
                          LOAD_END(_Cla1mathTablesLoadSize),
                          RUN_START(_Cla1mathTablesRunStart),
                          PAGE = 1


       .reset              : > RESET,      PAGE = 0, TYPE = DSECT
       vectors             : > VECTORS,    PAGE = 0, TYPE = DSECT

    }

    ---------------------------------------------------------------------------------

    void CLA_init (HAL_Handle handle)
    {
        HAL_Obj *obj = (HAL_Obj *)handle;
        PIE_Obj *pie = (PIE_Obj *)obj->pieHandle;
        // Assign ADCmemory location

        adcmemory=(unsigned short *)(handle->adcHandle);
        ENABLE_PROTECTED_REGISTER_WRITE_MODE;
        // Assign CLA ISR
        pie->CLA1_INT1 = &cla1_task1_isr;
        pie->CLA1_INT2 = &cla1_task2_isr;
        pie->CLA1_INT3 = &cla1_task3_isr;
        pie->CLA1_INT4 = &cla1_task4_isr;
        pie->CLA1_INT5 = &cla1_task5_isr;
        pie->CLA1_INT6 = &cla1_task6_isr;
        pie->CLA1_INT7 = &cla1_task7_isr;
        pie->CLA1_INT8 = &cla1_task8_isr;
        DISABLE_PROTECTED_REGISTER_WRITE_MODE;
    #ifdef FLASH
        //Copy over the CLA code(if running in standalone mode from FLASH)
        memCopy((uint16_t *) &Cla1funcsRunStart, (uint16_t *) &Cla1funcsLoadStart,
                (uint16_t *) &Cla1funcsLoadSize);
        // Copy CLA code from flash to RAM
        // Copy CLA math tabes from flash to RAM
        memCopy(&Cla1mathTablesRunStart, &Cla1mathTablesLoadStart, (uint16_t *)&Cla1mathTablesLoadSize);
    #endif

        CLK_enableClaClock (obj->clkHandle);

        ENABLE_PROTECTED_REGISTER_WRITE_MODE;
       Cla1Regs.MVECT1 = (uint16_t)((uint32_t)&Cla1Task1 -(uint32_t)&Cla1Prog_Start);
       Cla1Regs.MVECT2 = (uint16_t)((uint32_t)&Cla1Task2 -(uint32_t)&Cla1Prog_Start);
       Cla1Regs.MVECT3 = (uint16_t)((uint32_t)&Cla1Task3 -(uint32_t)&Cla1Prog_Start);
       Cla1Regs.MVECT4 = (uint16_t)((uint32_t)&Cla1Task4 -(uint32_t)&Cla1Prog_Start);
       Cla1Regs.MVECT5 = (uint16_t)((uint32_t)&Cla1Task5 -(uint32_t)&Cla1Prog_Start);
       Cla1Regs.MVECT6 = (uint16_t)((uint32_t)&Cla1Task6 -(uint32_t)&Cla1Prog_Start);
       Cla1Regs.MVECT7 = (uint16_t)((uint32_t)&Cla1Task7 -(uint32_t)&Cla1Prog_Start);
       Cla1Regs.MVECT8 = (uint16_t)((uint32_t)&Cla1Task8 -(uint32_t)&Cla1Prog_Start);
        DISABLE_PROTECTED_REGISTER_WRITE_MODE;
       ENABLE_PROTECTED_REGISTER_WRITE_MODE;

       Cla1Regs.MPISRCSEL1.bit.PERINT1SEL     = CLA_INT1_NONE;
       Cla1Regs.MPISRCSEL1.bit.PERINT2SEL     = CLA_INT2_ADCINT2;            // See Hal.c L840
       Cla1Regs.MPISRCSEL1.bit.PERINT3SEL     = CLA_INT3_NONE;
       Cla1Regs.MPISRCSEL1.bit.PERINT4SEL     = CLA_INT4_EPWM4INT;
       Cla1Regs.MPISRCSEL1.bit.PERINT5SEL     = CLA_INT5_NONE;
       Cla1Regs.MPISRCSEL1.bit.PERINT6SEL     = CLA_INT6_NONE;
       Cla1Regs.MPISRCSEL1.bit.PERINT7SEL     = CLA_INT7_NONE;
       Cla1Regs.MPISRCSEL1.bit.PERINT8SEL     = CLA_INT8_NONE;

           Cla1Regs.MICLROVF.all=0xFF;    // Clear all Overflow bits. Task 1 - 8.
        Cla1Regs.MMEMCFG.bit.PROGE = 1;
        Cla1Regs.MMEMCFG.bit.RAM0E = 1;
        Cla1Regs.MMEMCFG.bit.RAM1E = 1;
        Cla1Regs.MMEMCFG.bit .RAM0CPUE=1;
        Cla1Regs.MMEMCFG.bit .RAM1CPUE=1;
        Cla1Regs.MCTL.bit.IACKE = 1;
        Cla1Regs.MIER.all                      =     M_INT8;     // Enable Task 8
        DISABLE_PROTECTED_REGISTER_WRITE_MODE;
        Cla1ForceTask8andWait ();    // Run Task 8 Init CLA resolver

        ENABLE_PROTECTED_REGISTER_WRITE_MODE;
        Cla1Regs.MIER.all                      =     M_INT2 | M_INT4;     // Enable Task 2 and 4
        DISABLE_PROTECTED_REGISTER_WRITE_MODE;
    }

  • evs said:
     Cla1Prog        : > CLARAM0,
                         LOAD_START(_Cla1funcsLoadStart),
                         LOAD_END(_Cla1funcsLoadEnd),
                         LOAD_SIZE(_Cla1funcsLoadSize),
                         RUN_START(_Cla1funcsRunStart),
                         PAGE = 0

    Im surprised your CLA code is running at all. On the 28069, the CLA program code must be loaded into RAML3 (not CLARAM0). If you are running in  standalone (without the attached debugger) your code has to be in FLASH and then copied to RAM, so you should define Cla1Prog as follows

     Cla1Prog        :   LOAD = FLASHD,
                         RUN  = RAML3,
                         LOAD_START(_Cla1funcsLoadStart),
                         LOAD_END(_Cla1funcsLoadEnd),
                         LOAD_SIZE(_Cla1funcsLoadSize),
                         RUN_START(_Cla1funcsRunStart),
                         PAGE = 0

    You have correctly allocated the CLA math tables, so before you run CLA_init, be sure to memcpy the Cla1Prog and the CLA math tables to their "Run" locations and then run CLA init. 

  • It works because it is on a other page:

    PAGE 0 : /* Program Memory */
    /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
    RAML0 : origin = 0x008000, length = 0x000C00 /* on-chip RAM block L0 */
    CLARAM0 : origin = 0x009000, length = 0x000EFF
  • ah ok, did you allocate Cla1Prog to flash at load, and copy at runtime? the CLA can only execute code from RAML3, and can only access lower 64KW of memory (for data). If the atan is not working its one of two things: either the code is not in RAML3 or the tables aren't in RAML0 (or 1 or 2). Also you need to make sure that MMEMCFG is configured properly to give the CLA ownership of these RAMs
  • I solved the CLA problems:

     The problem: memcpy and memCopy don't have the same syntax. So my memory wasn't copied correctly. 

    The lack of documentation how the memory allocation is done is frustrating.  I didn't find any reference in the Technical Reference Manual, chapter CLA  that there are any limitation where/how to allocate memory for the CLA.  Only that there is a free 64k memory range.

      I think adding this to the CLA FAQ will help many.

    The resolver library:

     Debugging without pipeline flush is impossible. So trying to understand what is happening in the resolver library is possible. What I have done is checking which memory location are read/write.  I found that init_resolver_CLA is clearing some internal variables and some in rslvrOut. So that seems to work.

    To my surprise I can't find where resolver_algo_CLA()  is reading  rslvrOut.sin_input and rslvrOut.Cos_input and firCoeff. I probably missed a branch. Or there is something wrong with the library. But anyhow, there is no info what resolver_algo_CLA expect as input or how to solve problem.  So I give-up.

     I really like to hear from somebody that has successful tested the TMDSRSLVR_v1.0 Kit with demo program :Resolver_f28035_CLA.

    Thanks for the help.

     One frustrated user.

     If have the same problems: You need to add this to your CMD file:

    This is for the 28069 don't know if it is the same for other controllers: (Check memory range)

     _Cla1Prog_Start = _Cla1funcsRunStart;
     CLA_SCRATCHPAD_SIZE = 0x200;
    --undef_sym=__cla_scratchpad_end
    --undef_sym=__cla_scratchpad_start

    MEMORY
    {
    PAGE 0 :   /* Program Memory */
       CLAPROG       : origin = 0x009000, length = 0x00FFF     /* on-chip RAM block L3 */
    PAGE 1 :   /* Data Memory */
       CLARAM0              : origin = 0x008800, length = 0x000400
       CLARAM1              : origin = 0x008C00, length = 0x000400
     //  CLARAM2                : origin = 0x008000, length = 0x000800 

       CLAFLASHTABLES       : origin = 0x3F5F80, length = 0x002000   // Only if you need CLAMath can be anywhere in flash
       CLA1_MSGRAMLOW       : origin = 0x001480, length = 0x000080
       CLA1_MSGRAMHIGH      : origin = 0x001500, length = 0x000080


    }
    SECTIONS
    {
       .bss_cla          : > CLARAM1,      PAGE = 1
       .const_cla        : > CLARAM1,      PAGE = 1






    Cla1Prog        :   LOAD = FLASHD,
                         RUN  = CLAPROG,
                         LOAD_START(_Cla1funcsLoadStart),
                         LOAD_END(_Cla1funcsLoadEnd),
                         LOAD_SIZE(_Cla1funcsLoadSize),
                         RUN_START(_Cla1funcsRunStart),
                         PAGE = 0

       Cla1ToCpuMsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1
       CpuToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1

       Cla1DataRam0        : > CLARAM0,          PAGE = 1
       Cla1DataRam1        : > CLARAM1,          PAGE = 1

        CLAscratch      :
                      { *.obj(CLAscratch)
                        . += CLA_SCRATCHPAD_SIZE;
                        *.obj(CLAscratch_end)
                        *<*.obj>(CLAscratch_end)
                        } > CLARAM0,
                        PAGE = 1

       CLA1mathTables    : LOAD = CLAFLASHTABLES, /* Note for running from RAM the load and RUN can be the same */
                          RUN = CLARAM1,
                          LOAD_START(_Cla1mathTablesLoadStart),
                          LOAD_END(_Cla1mathTablesLoadEnd),
                          RUN_START(_Cla1mathTablesRunStart),
                         PAGE = 1

    }

    // -----------------------------------------------------

    Add this to your code:

    // Memory location references
    extern uint16_t Cla1funcsLoadStart;
    extern uint16_t Cla1funcsLoadEnd;
    extern uint16_t Cla1funcsLoadSize;
    extern uint16_t Cla1funcsRunStart;
    extern uint16_t Cla1Prog_Start;
    extern uint16_t Cla1mathTablesLoadStart;
    extern uint16_t Cla1mathTablesLoadEnd;
    extern uint16_t Cla1mathTablesRunStart;

    #ifdef FLASH
        //Copy over the CLA code(if running in standalone mode from FLASH)
        memCopy((uint16_t *) &Cla1funcsLoadStart, (uint16_t *) &Cla1funcsLoadEnd,
                (uint16_t *) &Cla1funcsRunStart);
        // Copy CLA math tabes from flash to RAM
        memCopy((uint16_t *)&Cla1mathTablesLoadStart, (uint16_t *)&Cla1mathTablesLoadEnd, (uint16_t *)&Cla1mathTablesRunStart);
    #endif