In the code below, I would like to test the state of INTM from C, without resorting to calling __disable_interrupts() just to get its return value.
Is there an easy way to do that?
Am I way out in the weeds in even trying to clear the pending interrupt this way?
This is on a TMS320F2807x.
//****************************************************************************
/*! @brief Flush any pending interrupts, if possible.
This flush only works if interrupts are enabled. Thus, it will
not work when called from an ISR.
It is assumed that the given interrupt is Disabled when this routine is
called. It may be Enabled and then Disabled by this function.
Note that this function may change the interrupt handler for this
interrupt. It does not restore the handler.
Reference 1460.TI_280x_interrupt_system_spru712h.pdf, section 6.3.2
Procedures for Enabling and Disabling Multiplexed Peripheral Interrupts
and/or TMS320F2807x Technical Reference Manual,
www.ti.com/lit/ug/spruhm9a/spruhm9a.pdf, section 2.4.4.3, Disabling Interrupts,
for TI's description of the complexity of clearing the PIEIFRx.n flag.
That is the flag that indicates a pending interrupt.
From that description: "The only safe way to clear a PIEIFR bit is to
have the CPU take the interrupt."
This function attempts to take the pending interrupt(s) through an
empty ISR, in order to clear the pending interrupt. However, that can
only be done if interrupts are currently enabled (if interrupts have been
disabled, there is probably a good reason for that, thus they should not
be re-enabled here).
@param [in] interruptNum - the interrupt to clear the pending ints for.
@param [in] flagBitsRegPtr - pointer to the PieCtrlRegs.PIEIFRn.all
register for the given interrupt.
@param [in] pendingBitMask - mask for evaluating the proper bit within
flagBitsRegPtr.
@return clearedState - zero if there is no longer a pending interrupt
(either successfully flushed or there was none)
non-zero if there is still a pending interrupt.
*/
//****************************************************************************
static uint_least8_t m_Xint_TryToFlushPendingInterrupts(uint32_t interruptNum,
volatile Uint16 *flagBitsRegPtr,
Uint16 pendingBitMask)
{
// are interrupts currently enabled?
// cpu core reg ST1.INTM == 1 -> disabled
// But, apparently there is no way to read that bit from C?
//
//if (coreRegisters.ST1.INTM) <----------------- Here is the question.
{
// is there a pending interrupt?
if ((*flagBitsRegPtr) & pendingBitMask)
{
/* there is a pending interrupt. Try to clear it. */
// register an empty interrupt service routine, for the
// purpose of doing an ireturn.
IntRegister(interruptNum, &Xint_Empty_Isr);
// enable the interrupt so that it can be flushed.
IntEnable(interruptNum);
// as soon as the interrupt was enabled, this thread should get
// interrupted, by the ISR. The ireturn from the ISR should
// clear the pending interrupt.
// restore the disabled state of the interrupt
IntDisable(interruptNum);
} // end then there is a pending interrupt
} // end then interrupts are disabled
// return zero if there is no pending interrupt; otherwise, non-zero
return((*flagBitsRegPtr) & pendingBitMask);
} // end m_Xint_TryToFlushPendingInterrupts
