F28377D can't allocate the SCI_A to CPU2?

Hi Elvis,

Please check if you have enabled the CLOCK for SCI_A from CPU2 using PCLKCR7 register. Also the code you have given above is getting executed from CPU1. Right?

Regards,

Vivek Singh

Hi, Vivek

If I allocate the SCIA to CPU1, the code is correct working in CPU1. And as I change to CPU2 as the code showing above ( with PCLKCR7 register set to “1” in CPU2）, the SCIA still worked in CPU1 !

Because I used EPWM also in CPU2, the EPWM can work in CPU2 correctly, so it confused me, why the SCIA can't be allocated to CPU2 and still working in CPU1?

Elvis,

If there is no issue with sharing the code, please attach CPU1/CPU2 code you are using in this case.

Regards,

Vivek Singh

CPU1

#include "F28x_Project.h"
#include "F2837xD_Ipc_drivers.h"
#include "RS232.h"
Uint16 Reciever2;

void main(void)
{
InitSysCtrl();

#ifdef _STANDALONE
#ifdef _FLASH
IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH);
#else
IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_RAM);
#endif
#endif

#ifdef _FLASH
InitFlash();
#endif

InitGpio(); // Skipped for this example
EALLOW;
GpioCtrlRegs.GPADIR.bit.GPIO13= 1
GPIO_SetupPinOptions(14, GPIO_OUTPUT, GPIO_PUSHPULL);
GPIO_SetupPinMux(14, GPIO_MUX_CPU2, 4);
GPIO_SetupPinOptions(28, GPIO_INPUT, GPIO_PUSHPULL);
GPIO_SetupPinMux(28, GPIO_MUX_CPU2, 1); //SCI GPIO Setup
GPIO_SetupPinOptions(29, GPIO_OUTPUT, GPIO_ASYNC);
GPIO_SetupPinMux(29, GPIO_MUX_CPU2, 1);
DevCfgRegs.CPUSEL5.bit.SCI_A = 1;
//TODO Add code to allow configuration of GPADIR from CPU02 using IPC
EDIS;
GpioDataRegs.GPADAT.bit.GPIO13 = 1;

DINT;


InitPieCtrl();

// scia_fifo_init(); // Initialize the SCI FIFO
// scia_echoback_init(); // Initialize SCI for echoback


IER = 0x0000;
IFR = 0x0000;


InitPieVectTable();

EINT;
ERTM;

for(;;)
{
GpioDataRegs.GPADAT.bit.GPIO13 = 0;
GPIO_WritePin(14, 1);
// scia_msg("Hello World!:\0");
// SciRecieve(&Reciever2);
DELAY_US(1000 * 500);

GpioDataRegs.GPADAT.bit.GPIO13 = 1;
GPIO_WritePin(14, 0);

DELAY_US(1000 * 500);
}
}

CPU2


Uint16 Reciever2;
void main(void)
{
#ifdef _FLASH
memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
#endif
InitSysCtrl();

#ifdef _FLASH
InitFlash();
#endif

EALLOW;
CpuSysRegs.PCLKCR7.bit.SCI_A = 1;
EDIS;
GPIO_WritePin(14, 1);
DINT;

InitPieCtrl();
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =0;
EALLOW;
scia_fifo_init(); // Initialize the SCI FIFO
scia_echoback_init(); // Initialize SCI for echoback
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =1;
EDIS;

IER = 0x0000;
IFR = 0x0000;

InitPieVectTable();

EINT;
ERTM;

for(;;)
{
//
//
GPIO_WritePin(14, 0);
scia_msg("Hello World!:\0");
SciRecieve(&Reciever2);
//
//
DELAY_US(1000 * 250);

//
//
GPIO_WritePin(14, 1);
//
//
DELAY_US(1000 * 250);
}
}

RS232.c


#include "RS232.h"
#include "F28x_Project.h"
#include <stdlib.h>

char* SendMessage;
char RecieveData[10];
Uint16 Reciever;
Uint32 out;

void scia_echoback_init()
{
// Note: Clocks were turned on to the SCIA peripheral
// in the InitSysCtrl() function

SciaRegs.SCICCR.all =0x0007; // 1 stop bit, No loopback
// No parity,8 char bits,
// async mode, idle-line protocol
SciaRegs.SCICTL1.all =0x0003; // enable TX, RX, internal SCICLK,
// Disable RX ERR, SLEEP, TXWAKE
SciaRegs.SCICTL2.all =0x0003;
SciaRegs.SCICTL2.bit.TXINTENA =1;
SciaRegs.SCICTL2.bit.RXBKINTENA =1;

//
// SCIA at 9600 baud
// @LSPCLK = 50 MHz (200 MHz SYSCLK) HBAUD = 0x02 and LBAUD = 0x8B.
// @LSPCLK = 30 MHz (120 MHz SYSCLK) HBAUD = 0x01 and LBAUD = 0x86.
//
SciaRegs.SCIHBAUD.all =0x0002;
SciaRegs.SCILBAUD.all =0x008B;

SciaRegs.SCICTL1.all =0x0023; // Relinquish SCI from Reset
}
void scia_xmit(int a)
{
while (SciaRegs.SCIFFTX.bit.TXFFST != 0) {}
SciaRegs.SCITXBUF.all =a;
}

void scia_msg(char * msg)
{
int i;
i = 0;
while(msg[i] != '\0')
{
scia_xmit(msg[i]);
i++;
}
}

// Initialize the SCI FIFO
void scia_fifo_init()
{
SciaRegs.SCIFFTX.all=0xE040;
SciaRegs.SCIFFRX.all=0x204f;
SciaRegs.SCIFFCT.all=0x0;
}

unsigned int SciRecieve(unsigned int *a)
{
unsigned int x;
x=0;

if(SciaRegs.SCIFFRX.bit.RXFFST!=0)
{
Reciever=SciaRegs.SCIFFRX.bit.RXFFST;
for(out=0; out<Reciever; out++)
{
RecieveData[out]= SciaRegs.SCIRXBUF.all;
}
*a=atol(RecieveData);
x=1;
}
return x;
}

void SciTran(unsigned int a)
{
Uint16 i;
i=0;
ltoa(a, SendMessage);
*SendMessage+='\0';
while(SendMessage[i] != '\0')
{
scia_xmit(SendMessage[i]);
i++;
}

}

RS232.h

extern void scia_echoback_init(void);
extern void scia_fifo_init(void);
extern void scia_xmit(int a);
extern void scia_msg(char *msg);
extern unsigned int SciRecieve(unsigned int *a);
extern void SciTran(unsigned int a);

extern char* RS232_Transmit;
extern char* RS232_Recieve;


extern char* SendMessage;
extern char RecieveData[10];

RS232.h

extern void scia_echoback_init(void);
extern void scia_fifo_init(void);
extern void scia_xmit(int a);
extern void scia_msg(char *msg);
extern unsigned int SciRecieve(unsigned int *a);
extern void SciTran(unsigned int a);

extern char* RS232_Transmit;
extern char* RS232_Recieve;


extern char* SendMessage;
extern char RecieveData[10];

Yes, Thank you Vivek.