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TMS320x2812 DSP Interrupt nesting

Alessandro Manfredi
Prodigy 190 points

Other Parts Discussed in Thread: CONTROLSUITE, SPRC097

Hi to all,

I'm developing a program on DSP2812 using interrupt. I read documentation about this, but I'm not clear if it is possible to work with nested interrupt.

For example: I have 2 interrupt source which are part respectively of INT1 and INT2 groups, both enabled at every level (peripheral, PIEIER, PIEACK, IER, CPU INTM).

If CPU is servicing INT2 (and INTM is again asserted), is it possible to service an incoming INT1 interrupt while ISR for INT2 is still in progress ? (or viceversa ??). Does DSP hardware recognize a new interrupt pending and service it with a new context saving ? And after that, RFI instruction return to previous ISR context ?

Thanks

  • 0
    TI__Expert 4595 points

    Hi Alessandro,

    Yes, INT2 can prevent INT1 from being serviced.

    Keep in mind the HW design of the 2812, when an ISR is entered all other interrupts are disabled. Therefore to avoid a low priority interrupt from preventing a higher priority interrupt from executing, the ISR needs to re-enable all interrupts of higher priority thus allowing nested interrupts while the low priority ISR is executing.

    Your SW has control over which interrupts are re-enabled.  ControlSUITE has a good example for this:  C:\TI\controlSUITE\device_support\f2833x\v140\DSP2833x_examples_ccsv5\sw_prioritized_interrupts.  Though the 281x devices are longer in controlSUITE, the examples for the other devices are excellent references that can certainly be used for the 2812.

    Other references:  

    • See page 6-11 in SPRU078D
    • Software-prioritizing interrupts. Use the method found in C281x C/C++ Header Files and Peripheral Examples in C (literature number SPRC097).

    Jeff

  • 0 in reply to Jeff Stafford
    Prodigy 190 points

    Hi Jeff,

    thanks for your explanation !!

    Now it's clear for me that is possible nesting interrupt ...

    I've only another question now: in my example, I mentioned INT2 interrupted by INT1. Is it possible, by using properly interrupt enables, INT1 interrupted by INT2 ? And so, suspend ISR for INT1 and, under controlled condition, serve INT2 ??

    Anyway, I'll take care of reading suggested example