Running from flash

Anthony Spears

Hi,

I am trying to get code to run from flash on a F28335 and it gives me a bunch of errors. It also gives errors when I use the code composer flash erase tool.

Here are the errors:

C28xx: Loader: One or more sections of your program falls into a memory region that is not writable. These regions will not actually be written to the target. Check your linker configuration and/or memory map.

C28xx: Target did not halt properly during a Flash operation.

C28xx: File Loader: Data verification failed at address 0x00330000 Please verify target memory and memory map.

Error found during data verification. Ensure the linker command file matches the memory map.

C28xx: Target did not halt properly during a Flash operation.

C28xx: Flash Programmer: Error erasing flash memory. Sysclk (500) is not within the valid range [15,150]. Adjust the OSCCLK and PLLCR value accordingly.

C28xx: Target did not halt properly during a Flash operation.

Here is my linker file:

MEMORY

{

PAGE 0 :

/* BEGIN is used for the "boot to SRAM" bootloader mode */

/* BOOT_RSVD is used by the boot ROM for stack. */

/* This section is only reserved to keep the BOOT ROM from */

/* corrupting this area during the debug process */

/* BEGIN : origin = 0x000000, length = 0x000002*/ /* Boot to M0 will go here */ // A Spears Removed - 4/30/10

BEGIN : origin = 0x338000, length = 0x000002 // A Spears Added 4/30/10

// BOOT_RSVD : origin = 0x000002, length = 0x00004E /* Part of M0, BOOT rom will use this for stack */ // A Spears Deleted 4/30/10

BOOT_RSVD : origin = 0x338002, length = 0x00004E // A Spears Added 4/30/10

// RAMM0 : origin = 0x000050, length = 0x0003B0 // A Spears Deleted 4/30/10

FLASHM0 : origin = 0x338050, length = 0x0003B0 // A Spears Added 4/30/10

RAML0 : origin = 0x008000, length = 0x001000

RAML1 : origin = 0x009000, length = 0x003000

// RAML2 : origin = 0x00A000, length = 0x001000

// RAML3 : origin = 0x00B000, length = 0x001000

ZONE7A : origin = 0x200000, length = 0x00FC00 /* XINTF zone 7 - program space */

CSM_RSVD : origin = 0x33FF80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */

CSM_PWL : origin = 0x33FFF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */

ADC_CAL : origin = 0x380080, length = 0x000009

RESET : origin = 0x3FFFC0, length = 0x000002

IQTABLES : origin = 0x3FE000, length = 0x000b50

IQTABLES2 : origin = 0x3FEB50, length = 0x00008c

FPUTABLES : origin = 0x3FEBDC, length = 0x0006A0

BOOTROM : origin = 0x3FF27C, length = 0x000D44

BEGIN_FLASH : origin = 0x3F7FF6, length = 0x000002

FLASHB : origin = 0x330000, length = 0x008000

FLASHC : origin = 0x328000, length = 0x008000

PAGE 1 :

// RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */ // A Spears Deleted 4/30/10

FLASHM1 : origin = 0x338400, length = 0x000400 // A Spears Added 4/30/10

RAML4 : origin = 0x00C000, length = 0x002000 //was length = 0x001000

RAML5 : origin = 0x00E000, length = 0x001000

RAML6 : origin = 0x00F000, length = 0x001000

// RAML7 : origin = 0x00F000, length = 0x001000

FLASHD : origin = 0x320000, length = 0x008000

FLASHE : origin = 0x318000, length = 0x008000

FLASHF : origin = 0x310000, length = 0x008000

FLASHG : origin = 0x308000, length = 0x008000

FLASHH : origin = 0x300000, length = 0x008000

ZONE7B : origin = 0x20FC00, length = 0x000400 /* XINTF zone 7 - data space */

ZONE0 : origin = 0x004000, length = 0x001000 // A SPEARS ADDED

}

SECTIONS

{

/* Setup for "boot to SARAM" mode:

The codestart section (found in DSP28_CodeStartBranch.asm)

re-directs execution to the start of user code. */

codestart: > BEGIN_FLASH, PAGE = 0

// codestart : > BEGIN, PAGE = 0

// ramfuncs : > RAML0, PAGE = 0

ramfuncs: LOAD = FLASHB, PAGE = 0

RUN = RAML0, PAGE = 0

RUN_START(_secureRamFuncs_runstart),

LOAD_START(_secureRamFuncs_loadstart),

LOAD_END(_secureRamFuncs_loadend)

// .text : > RAML1, PAGE = 0

.text : > FLASHC, PAGE = 0 // A Spears Added 4/30/10

/* .cinit : > RAML0, PAGE = 0 */

/* .pinit : > RAML0, PAGE = 0 */

// .switch : > RAML0, PAGE = 0

.switch : > FLASHB, PAGE = 0 // A Spears Added 4/30/10

// .data : > RAML2, PAGE = 0 /* KG added line */

// .bss : > RAML3, PAGE = 0 /* KG added line */

// .stack : > RAMM1, PAGE = 1

.stack : > FLASHM1, PAGE = 1 // A Spears Added 4/30/10

// .ebss : > RAML4, PAGE = 1

.ebss : > FLASHF, PAGE = 1 // A Spears Added 4/30/10

// .econst : > RAML5, PAGE = 1

.econst : > FLASHG, PAGE = 1 // A Spears Added 4/30/10

// .esysmem : > RAMM1, PAGE = 1

.esysmem : > FLASHM1, PAGE = 1 // A Spears Added 4/30/10

// IQmath : > RAML1, PAGE = 0

IQmath : > FLASHC, PAGE = 0 // A Spears Added 4/30/10

IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD

IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD

FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD

/* DMARAML4 : > RAML4, PAGE = 1 */

/* DMARAML5 : > RAML5, PAGE = 1 */

DMARAML6 : > RAML6, PAGE = 1 //DMA

/* DMARAML7 : > RAML7, PAGE = 1 */

ZONE7DATA : > ZONE7B, PAGE = 1

ZONE0DATA : > ZONE0, PAGE = 1

.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used */

csm_rsvd : > CSM_RSVD PAGE = 0, TYPE = DSECT /* not used for SARAM examples */

csmpasswds : > CSM_PWL PAGE = 0, TYPE = DSECT /* not used for SARAM examples */

/* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */

.adc_cal : load = ADC_CAL, PAGE = 0, TYPE = NOLOAD

}

Thank you,

Anthony Spears

over 16 years ago

0 andreas von kaenel over 16 years ago

Genius 4925 points

Anthony,

Did you run the FlashFrequency Test? I think one of your problems is based on wrong clock settings. See your processors FLASH API documentation, it should contain a section called frequency and PLL configuration toggle test.

Best regards

Andreas

0 Lori Heustess over 15 years ago

TI__Guru* 93800 points

Some of the FAQ's listed here may help:

http://processors.wiki.ti.com/index.php/C2000_Flash_Common_Issues/FAQs

Regards,

Lori

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Running from flash