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F2837xD programming CPU2 from external serial flash

jimj2713
Expert 2365 points

I have a working dual CPU application on the F28377, and the DSP has an external serial-flash for configuration and firmware-upgrade storage. In our application, I can load new firmware via CAN into the serial-flash, and CPU1 can restart and load its own internal flash from the serial-flash in order to upgrade the firmware. I cannot do this via the DSP internal bootloader die to hardware restrictions.


I want to do the same or similar operation with CPU2. Ideally CPU1 would still control the CAN communication and CPU1 would bring the new CPU2-image into serial-flash. After that I am unclear on what restrictions I have to allow CPU2 to program its own internal flash. Whenever I try to call the FlashApi library functions from CPU2, I ESTOP on an illegal ISR. When loading both CPUs via the debugger, there is a warning message that states "If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code.  Also, CPU1 will be halted to determine SR ownership for the CPU which will run the Flash Plugin code, after which CPU1 will be set to run its application. User code execution from SR could commence after both flash banks are programmed."

Is this warning relevant to the debugger only, or does this warning suggest that I need to halt my CPU1 application before I can allow my CPU2 to program its own internal flash? Are there other actions I must take on the CPU1-side in order to allow CPU2 to seize the Flash pump and program its own flash?

Thanks,

Jim

  • 0
    TI__Guru* 87105 points
    Jim,

    Regarding the warning message from debugger: CCS Flash Plugin uses shared RAM for doing Flash operations (as Shared RAM is the only unsecured RAM available for both CPUs). When CPU1 Flash Plugin is used, shared RAM ownership is needed for CPU1. When CPU2 Flash Plugin is used, shared RAM ownership is needed for CPU2. At reset, CPU1 owns the shared RAM for read/write. When CPU2 Flash operations are selected by user in CPU2 Flash Plugin, Flash Plugin will halt the CPU1 (if it is executing) and configures the GSxMSEL register to give the shared RAM ownership to CPU2 so that CPU2 Flash Plugin code can get executed. Hence, when using CCS Flash Plugin, if the application uses shared RAM, we suggest them to load both CPU1 Flash and CPU2 Flash (if both CPUs are involved in the application) before executing them.

    Coming to your situation: Which memory are you using to execute Flash API on CPU2 subsystem? If it is shared RAM, make sure that your CPU1 application provides the shared RAM ownership to CPU2 (using GSxMSEL register) so that CPU2 can fetch the code from shared RAM.

    Thanks and regards,
    Vamsi
  • 0 in reply to Vamsi Gudivada
    Expert 2365 points
    Vamsi,
    Thanks; that was it.
    Jim