This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

What are correct Data GP I/O pins in parallel boot mode for TMS320F28377

Other Parts Discussed in Thread: TMS320F28377D

Hello,

We are working with TMS320F28377D and we found the discrepancy in Technical Reference Manual (Rev.E) for Parallel Boot Mode data I/O signal definition. When you look to this document http://www.ti.com/lit/pdf/spruhm8 , on page 569, chapter "3.25.7 Parallel Boot Mode" you can see, that in figure 3-20 is description for Data GP I/O pins as [63-58,64,65]. However in the first sentence of this chapter you can see that this data bus is defined like pins GPIO0-GPIO5,GPIO8, GPIO9. Also on table 3-22 there is used this signal definition. You can see it also in attached picture file. Which data GP I/O definition is correct? GPIO[63-58,64,65] or GPIO[0-5,8,9]?

 Thank you for your quick answer!

Best regards,

Frantisek