I am using the quadrature encoder module to measure position and estimate velocity of an encoder. To estimate velocity, I use the low-speed approximation, v(k) = X / (t(k) - t(k-1)), where X is unit position. To do so, I set the appropriate registers in EQep1Regs:
EQep1Regs.QCAPCTL.bit.UPPS = 0; // UPEVNT = QCLK/1 (i.e. one tick) EQep1Regs.QCAPCTL.bit.CCPS = 0x7; // CAPCLK = SYSCLKOUT/128 EQep1Regs.QCAPCTL.bit.CEN = 1; // Enable
along with other EQep1Regs not shown. For simplicity, I use register polling (instead of interrupts), to update my velocity estimation. Every loop cycle, I run:
if (EQep1Regs.QEPSTS.bit.UPEVNT == 1) {
Uint16 delta_T = EQep1Regs.QCPRD;
double dt = (((double) delta_T) / 200000000.0) * 128.0; // CAPCLK = SYSCLKOUT/128
v_lo_speed = DX / dt; // DX is previously defined as a double unit length
EQep1Regs.QEPSTS.bit.UPEVNT = 1; // Reset UPEVNT flag
} else if (EQep1Regs.QEPSTS.bit.COEF == 1) {
v_lo_speed = 0.0;
EQep1Regs.QEPSTS.bit.COEF = 1; // DOES NOT CLEAR COEF bit!
}
I've also tried using each and every QCLR bit to clear the COEF, as the technical reference manual (SPRUHX5C, pg 1855) instructs. However, there is no QCLR bit that corresponds to the QEPSTS.bit.COEF bit.
Which register should I use to clear the capture timer overflow error flag?
