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display ADC result Code Composer Studio TMS320F28377D

Leonardo Callegaro
Expert 1605 points
Other Parts Discussed in Thread: TMS320F28377D

Hi all,

I am learning about the ADC on TMS320F28377D. I am using channel ADCB-4 to sample a 1kHz sinewave. The ADC is setup to be triggered when the PWM carrier (10kHz) meets the CMPA value. The ADCB result register is displayed in the graph below.

Is it possible to display this graph without the rough value jumps I have marked up, and why do they happen? 

Other info:

ADCB is configured as follow

AdcbRegs.ADCSOC4CTL.bit.CHSEL = 4;
AdcbRegs.ADCSOC4CTL.bit.ACQPS = 14; 
AdcbRegs.ADCSOC4CTL.bit.TRIGSEL = 5;

the pwm configuration in regards to the ADC is:

EPwm1Regs.ETSEL.bit.SOCBEN = 1;
EPwm1Regs.ETSEL.bit.SOCBSEL = 4;
EPwm1Regs.ETPS.bit.SOCBPRD = 1; 

with 

EPwm1Regs.TBPRD=10000;

EPwm1Regs.CMPA=5000;

the result buffer includes 100 samples.

Thank you so much for your help,

Leo

  • TI__Guru 60865 points
    Hi Leo,

    If the ePWM frequency is 10KHz and the input frequency is 1KHz, how do you explain that you are getting 20 samples per-period in the graph? It looks like you are sampling twice as fast as intended?

    Are any other ADC SOCs running at the same time (you are using SOC4)? Is it possible that SOC4 is occasionally delayed by the other conversions?
  • in reply to Devin Cottier
    Expert 1605 points

    Hi Devin,

    Thanks for the quick reply, you are right :)

    The problem about displaying 20 samples in one period (rather than 10), is because I was setting ADC-B4 to be activated by a SOCA generated by EPWM1 (rather than SOCB like I wanted):

    AdcbRegs.ADCSOC4CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C

    for which the setting was:

    EPwm1Regs.ETSEL.bit.SOCASEL =3 (ADC SOC triggered when TBCTR=0 and TBCTR=PRD)

    Keeping the ADC B4 being triggered by EPWM1 SOCA/C, all I had to do was to change the line above as:

    EPwm1Regs.ETSEL.bit.SOCASEL =4 (ADC SOC triggered when TBCTR=CMPA, note: CMPA = TBPRD/2)

    So now, the ADC conversion B4 works based on the SOCA/C sent by EPWM1, when TBCTR=CMPA (which happens only once in a period, @ 10kHz up count mode). 

    Still looking for a solution on how to display the time graph without rough jumps in value, if you can help it would be great.

    Thank you

    Leo

  • in reply to Leonardo Callegaro
    TI__Guru 60865 points
    What is the source of your 1KHz sine wave and what is the impedance of that signal source? You S+H setting looks to be 75ns, which is the minimum and would assume that the driver for your sine wave is very low impedance.
  • in reply to Devin Cottier
    Expert 1605 points
    Hi Devin, thanks for the reply. Yes in setting up the ADC I have

    if(ADC_RESOLUTION_12BIT == AdcaRegs.ADCCTL2.bit.RESOLUTION){
    acqps = 14; //75ns

    and being the ADC 12-bit, S+H is 74ns as you have said.

    The 1kHz signal comes from a function generator "GW INSTEK" GFG-8015G, whose output impedance is 50ohm (?).

    Also, the function generator output is not connected straight to the ADC input pin. It goes through some OP amps to scale down the signal to 0-3.3V and finally to the ADC...

    Thanks

    Leo
  • in reply to Leonardo Callegaro
    TI__Guru 60865 points
    Hi Leo,

    If the ADC input is driven directly by the op-amp that comes after reducing the voltage from the function generator, then using the 75ns S+h window should be fine. If you have a large R or C as part of a low-pass filter at the op-amp output/ADC input, then you may need to increase the S+H value. The only impedance that matters for determining the S+H duration is the last stage driving the ADC; I don't think it will matter too much what the output impedance of the function generator actually is in this case.

    My best guess as to what is causing the issue is still that you may have multiple ADC loops running asynchronously which are periodically causing a delay in one of the ADC conversion results. Can you confirm that ADCB SOC4 is the only SOC in use?