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2837xD IER/IFR definitions

Slobodan Gataric
Expert 1030 points


I searched whole 2837xD Technical Reference Manual (SPRUHM8C) for IER register definition (keywords IER, IFR, "Interrupt Enable Register"), and could
not find it. This is incredible. I wonder if someone can point where is the document containing the 2837xD IER/IFR registers definitions? It seemed to me that the Technical Reference Manual is a place for it. :)

Thank you.

Slobodan Gataric

  • 0
    TI__Mastermind 27200 points

    Slobodan,

    The C28x compiler treats IFR and IER as special keywords so the interrupt registers (which are not memory mapped) can be manipulated easily in the code.  To do this, there is a reserved "cregister" declaration.  The place to look for it is in section 6.5.2 of the C Compiler User' s Manual:

    http://www.ti.com/lit/ug/spru514j/spru514j.pdf

    Regards,

    Richard

  • 0 in reply to Richard Poley
    TI__Guru** 115521 points

    Also, to understand the functional details of these registers you can refer the "CPU Interrupts Overview" section of CPU User Guide.

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    Expert 1030 points
    Thx. TI made a good move when you integrated zillion pdf files (28335 documentation) into one Technical Reference Manual. I hate multiple files approach because it takes long time to find things that are referenced in multiple pdf files. The IER definition for 28335 was in "TMS320x2833x, 2823x System Control and Interrupts" (SPRUFB0B). It looks like the 28377xD equivalent document is part of 2837xD Technical Reference Manual (Chapter 2). I do not understand why the register description is not there. It is so logical to be there. 99% of engineers that have used 28335 would look for it there. Please add it in the next version.
  • 0 in reply to Slobodan Gataric
    TI__Guru* 92250 points
    Thank you for the feedback. I will pass it along to the technical team and tech writer team.

    Regards
    Lori
  • 0 in reply to Lori Heustess
    Expert 1030 points

    Lori,

    Please pass to the technical documentation team following as well:

    Table 4.1 from the 2837xD (Signal Description) data sheets MUST BE in the chapter 7 of TRM. It is ridicules that the TRM chapter 7 which is about configuring GPIO does not have a table that defines what peripherals are mapped into GPIO pins. The MUX tables (for example Table 7-66 in the TRM) MUST specify what are the meaning of bit combinations. It is not enough to say:

    31-30    GPIO15      R/W        0h       Defines pin-muxing selection for GPIO

    It has to specify what 4 bit combinations mean (00, 01, 10,11). The idea is to have all information needed to properly configure GPIO in one place and not to need to search multiple pdf files (like in 28335 documentation which I hate with passion).

    Another example of bad documentation: I did not find anywhere spelled out that two bits from GPxMUXy are TWO LOWER BITS, and two bits from GPxGMUXy are TWO UPPER BITS in the muxes from Figure 7-1 of TRM. I only guess that letter "G", which means "Group", is indication that its two bits are higher order bits. These things have to be spelled out. There should not be room for guessing.

    Thank you.

    Slobodan Gataric