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[F28377S]How big SDRAM memory support in EMIF2_CSO ??

Moonsuny Park
Prodigy 230 points

I read 6.3.3 EMIF OF DATASHEET(Rev.B)

and found EMIF2_CS0 has 64M x16bit size but I think it's impossible
because most 512Mbit SDRAM has 13bit Row address line(a0~a12)
but emif2 has only 12bit(a0~a11) so EMIF2 can handle only 128Mbit SDRAM ..

is this correct??

  • 0
    TI__Guru** 116421 points

    Hi Park,

    Yes, with 12 address lines we can not have 64M x 16bit range. Document need to be updated for the same., Since it's 16bit interface, EMIF2 can handle up to 256Mbit SDRAM (12 ROW + 4BANK + 10 COLUMN = 24, which is 16M x 16bit). Do you agree ?

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    Prodigy 230 points

    YES !!

    this is correct " 12 ROW + 4BANK + 10 COLUMN = 24, which is 16M x 16bit (256Mbit) "

    but every SDRAM in the market support both 16bit and 8bit data bus width.. so they need 13 address line..

    please... just read any Maker SDR SDRAM datasheet..

    and let me know there is suitable 256Mbit SDR SDRAM for EMIF2

     

    of course I know F28377s have EMIF1 (hm... 256M x 16bit ) but you know what??

    I CAN NOT use EM1_A13 pin for SRAM.. beacuse it is same pin with EM1CAS..
    and EM1_A14~A19 has same problem...

  • 0 in reply to Moonsuny Park
    TI__Guru** 116421 points

    Hi Park,

    Thanks for your feedback !!

    You are right that there may not be any memory available today which supports these configuration but our design document provides the capability of our design only. Our design supports up-to 11 address lines for column address which may not be supported by any SDRAM device today hence user need to use what is best available in market (in this case it could be 128Mb for EMIF2). But if in future there is SDRAM device available with more column address lines then those can also be used. 

    On below,

    of course I know F28377s have EMIF1 (hm... 256M x 16bit ) but you know what??

    I CAN NOT use EM1_A13 pin for SRAM.. because it is same pin with EM1CAS..
    and EM1_A14~A19 has same problem...

    That is correct. If you want to use larger SRAM device with SDRAM then you can not use EMIF1.  We are planning to fix this constraint on our next device.

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    TI__Guru** 116421 points
    Hi Park,

    Let us know if you have any further queries/feedback on this.

    Regards,
    Vivek Singh
  • 0 in reply to Vivek Singh
    Mastermind 7025 points

    Vivek Singh said:

    On below,

    of course I know F28377s have EMIF1 (hm... 256M x 16bit ) but you know what??

    I CAN NOT use EM1_A13 pin for SRAM.. because it is same pin with EM1CAS..
    and EM1_A14~A19 has same problem...

    That is correct. If you want to use larger SRAM device with SDRAM then you can not use EMIF1.  We are planning to fix this constraint on our next device.

    Regards,

    Vivek Singh

    And when are you supposed to release that device?

    If we develop a module with F28377S today, will we be able to replace with the future device?

    Thank you

  • 0 in reply to PAk
    TI__Guru** 116421 points

    Hi,

    Sorry for late reply on this -

    And when are you supposed to release that device?

    We don't have the release date for this device yet.

    If we develop a module with F28377S today, will we be able to replace with the future device?

    It should be but we have to wait for the new device definition to be complete before confirming on these info.

    Regards,

    Vivek Singh