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Need Help on TMS320F28377

Other Parts Discussed in Thread: CONTROLSUITE

Hello,

I am willing to program CPU2 Flash using CPU1. Is it possible? and if yes, how it can be implemented?

 

Thanks,

Pratap Chape 

  • Hi Pratap,

    CPU2 Flash can not be programmed by CPU1. What you can do is download the Flash API code in shared RAM via CPU1 and  give Shared RAM access to CPU2 so that CPU2 can execute that code to program/erase it's Flash.

    Regards,

    Vivek Singh

  • Hi,

    I will continue in this thread because I meet the same problem.

    I have a little bit another case - I load the code direct to RAM and run it from this location. In my actual project I'm using "2837xD_RAM_lnk_cpu1.cmd" linker file(can be found in \ti\controlSUITE\device_support\F2837xD\v190\F2837xD_common\cmd). Thus the code is downloaded to M0 RAM, LS0 RAM and D0 RAM. With this settings I can successful work with CPU1 flash.

    What is needed to do with my code for flash programming, if I want program CPU2 Flash? What is the mechanism in the code to switch from CPU1 to CPU2 and programming CPU2 flash? You wrote, that code must be loaded to shared RAM. Which linker files must be than used? 2837xD_RAM_lnk_shared_cpu1.cmd or 2837xD_RAM_lnk_shared_cpu2.cmd? Or any other linker file?

    I suppose that I need to upgrade my CPU1 project after PLL clock phase to switch to CPU2 but I don't know how..

    Thanks and regards,
    Tomas
  • Tomas,

    The issue discussed on this thread is different than that of yours. This thread is talking about programming CPU2's Flash bank using CPU1. Your issue is about programming CPU2's Flash bank using CPU2. I would suggest you to continue discussing your issue in the original thread that you started.

    Thanks and regards,
    Vamsi
  • Hi Vivek,

    Thanks for the information.

    I have few more queries on downloading API code in shared RAM and to give access to CPU2.

    1. Flash1 will have Flash2 driver code and CPU1 will put same in shared RAM. 

    2. Flash2 will be empty and there will not be single byte of code. Meaning is CPU2 will not have any code in its scope except shared RAM. 

    3. App hex to be programmed on Flash2 will be received by CPU1 via CAN.

    Considering above given scenario, please suggest all the possible ways to program Flash2 with the help of CPU1 and CPU2.  

     

    Thanks,

    Pratap Chape

    John Deere India.

     

  • Hi Pratap,

    I am marking our flash expert and flash programming tool expert to have a look into your request.

    Regards,

    Vivek Singh

  • We have a serial flash programming solution available in controlSUITE.

    Please see:
    www.ti.com/lit/sprabv4
    F2837xD_sci_flash_kernels in controlSUITE
    serial_flash_programmer in controlSUITE
    F2837xD_flash_programming example in controlSUITE

    sal
  • Hi Sal,

    I have already gone through the options you suggested.
    But I have some strict criteria as given below and I am willing to follow that.

    1. Flash1 will have Flash2 driver code and CPU1 will put same in shared RAM.

    2. Flash2 will be empty and there will not be single byte of code. Meaning is CPU2 will not have any code in its scope except shared RAM.

    3. App hex to be programmed on Flash2 will be received by CPU1 via CAN.

    Considering above given scenario, please suggest all the possible ways to program Flash2 with the help of CPU1 and CPU2.


    Thanks,

    Pratap Chape

    John Deere India.
  • Pratap,

    The suggestion is to follow the flow of the serial flash programmer which uses the sci_flash_kernels.

    If you have specific questions about the flow, I can answer them here, but it is documented in the above App Note.

    sal
  • Sal,

    Is sci_flash_kernels the only way to program CPU2 flash through CPU1?

    I have my Secondary Boot Block on CPU1 flash and it's able to program App on CPU1 only. We are using our own CAN based PC tools and hardware for same. Secondary BB communicates with PC tools through CAN interface.

    Now, the case is I want to add CPU2 flash driver in same Boot block and to program CPU2 flash. For this I was thinking that CPU2 flash driver will be placed in shared RAM(i.e. GSxRAM) and then control will be given to CPU2 to call those driver APIs. Is it possible? If yes then please provide all the details regarding this. Is it possible that Kernel commands can be used by CPU1 to program CPU2 flash?

     

    Thanks,

    Pratap Chape    

  • Pratrap,

    Have you read the App Note cited above?

    This has all the details regarding this. I cannot detail it all on this forum. That is why we created an App Note for customers to read and learn from. We spent a lot of time on the App Note. Please consider reading it.

    sal