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Capture PWM Counter Value on falling edge of TZ TMS320F2802x

Tobias Schmid
Prodigy 250 points

Hi all,

I Try to capture the PWM Counter value on a falling edge on the TZ3 input of my 2802x device.

So far I was able to configure the Digital-Compare submodule and generate a DCAEVT1 event. For testing purpose I set the EPwm1Regs.DCACTL.bit.EVT1SYNCE = 1; and checked the EPWMSYNCO on the devise pin. The Counter Caputre of the Digital Compare Submodule shows only a 1 in the DCCAP register. The actual configuration of the PWM module is shown below:

// Setup TBCLK
EPwm1Regs.TBPRD = PWM1_TIMER_TBPRD;
EPwm1Regs.TBPHS.half.TBPHS = 0;
EPwm1Regs.TBCTR = 0;
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;

// Setup shadow register load on ZERO
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

// Set Compare values
EPwm1Regs.CMPA.half.CMPA = 20;
EPwm1Regs.CMPB = 120;

// Set actions
EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;
EPwm1Regs.AQCTLA.bit.CBU = AQ_CLEAR;

// Set Events
EPwm1Regs.ETSEL.bit.INTSEL = 1; 
EPwm1Regs.ETSEL.bit.INTEN = 1;
EPwm1Regs.ETPS.bit.INTPRD = 1;

//PWM1 Digital Compare Module
EALLOW;
EPwm1Regs.DCTRIPSEL.bit.DCAHCOMPSEL = DC_TZ3; // DCAH = TZ3
EPwm1Regs.TZDCSEL.bit.DCAEVT1 = TZ_DCAH_LOW; // DCAH = low, DCAL = don't care
EPwm1Regs.DCACTL.bit.EVT1SRCSEL = DC_EVT_FLT;//DC_EVT_FLT; // DCAEVT1 = DCAEVT_FLT (filtered)
EPwm1Regs.DCACTL.bit.EVT1FRCSYNCSEL = DC_EVT_SYNC; // Take sync path
EPwm1Regs.DCACTL.bit.EVT1SYNCE = 0; // sync PWM for testing purpose 
EPwm1Regs.DCFCTL.bit.BLANKE = 1;
EPwm1Regs.DCFCTL.bit.PULSESEL = 1;
EPwm1Regs.DCFWINDOW = 1;
EPwm1Regs.DCCAPCTL.bit.CAPE = 1;
EPwm1Regs.DCCAPCTL.bit.SHDWMODE = 1;

EPwm1Regs.TZCTL.all = 0x0FFF; // Do nothing on DCAEVT1
EDIS;

Is it possible to capture the TBCTR on a falling edge of an external signal?

Sincerely,

Tobias

  • 0
    TI__Mastermind 27200 points

    Tobias, 

    I don't see a way to do this within the ePWM module.  Hwoever, one approach which may work for you if you want to capture ePWM1 time-base is to set up eCAP1 module to run at the same frequency as ePWM1 and synchronize the two counters (generate a SYNCOUT from the ePWM1 TBCTR and use this as the SYNC input to eCAP1).  You can then route the TZ3 signal into the eCAP1 input pin and set that up to capture the capture timer on a falling edge.

    Regards,

    Richard

  • 0 in reply to Richard Poley
    TI__Mastermind 24095 points
    Hi Tobias,

    I think your configuration is correct - what could be happening is, since you enabled SYNC, the PWM counter is getting loaded with the Phase of Zero due to the sync event and the same is being used to capture the time base counter in DCCAP, with signal delay. Can you try disabling phase loading EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; and try the same code?

    -Bharathi.
  • 0 in reply to Subrahmanya
    Prodigy 250 points
    Hi Bharathi,

    Even with disabling the phase loading with EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; and disabling the sync pulse generation with EPwm1Regs.DCACTL.bit.EVT1SYNCE = 0; the DCCAP value is still at 1.

    Regards,
    Tobias
  • 0 in reply to Tobias Schmid
    TI__Mastermind 24095 points
    Tobias,

    Do you see the EPwm1Regs.DCCAPCTL.bit.CAPSTS being set.
    Configuration seems correct. Is it possible that another DC event is overwriting the captured value?
    When exactly are you reading the DCCAP register in your s/w?
    Can you also try EPwm1Regs.DCCAPCTL.bit.SHDWMODE=0 and attempt reading after counter zero?

    -Bharathi.
  • 0 in reply to Subrahmanya
    Prodigy 250 points
    Hi Bharathi,

    I am using the 28020 device with a type 1 ePWM module. The CAPSTS bit was added in the ePWM type 4 module of the 2807x series.
    The DCCAP register is read in the PWM1 interrupt at zero period. EPwm1Regs.DCCAPCTL.bit.SHDWMODE=0 and 1 doesnt make a difference.

    Tobias
  • 0 in reply to Tobias Schmid
    TI__Mastermind 24095 points
    Tobias,

    It's not clear why the same value is being captured irrespective of whether SYNC is enabled or disabled.
    Is TZ3 input a periodic signal? What if you changed the TZ3 input - do you see same value being captured?

    -Bharathi.