I am currently trying to perform communication between a Piccolo Launchpad and a Rasberry Pi. Right now we see SPIDAT change and both devices see this change in register. However, the SPITXBUF and SPIRXBUF do not change during operation. Does anyone have an idea on what might be happening? Manually changing TXBUF does not change SPIDAT either.
This is my SPI setup code. The Piccolo works as the slave and the Pi as the master.
void init_SPI_GPIO(void)
{
EALLOW;
GpioCtrlRegs.GPAPUD.bit.GPIO16 =0; //enable pullup
GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 1; //spisimo
GpioCtrlRegs.GPAPUD.bit.GPIO17 =0; //enable pullup
GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 1; //spisomi
GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0; /* Enable pull-up on GPIO18 (SPICLKA)*/
GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 1; /* Configure GPIO18 as SPICLKA*/
GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0; /* Enable pull-up on GPIO19 (SPISTEA)*/
GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1; /* Configure GPIO19 as SPISTEA*/
EDIS;
}
void init_SPI_A(int16 Mode,int16 BaudRateFactor,int16 DataBits,int16 ClockPolarity,int16 ClockPhase,int16 FIFOTransmitDelay)
{
EALLOW;
/* initialize SPI_A FIFO registers */
SpiaRegs.SPICCR.bit.SPISWRESET = 0; /* SPI S/W Reset, bit 7*/
SpiaRegs.SPICCR.bit.SPICHAR = 15;/* Character length control, bit 0~3 */
SpiaRegs.SPICCR.bit.SPILBK = 0; /* Configure SPI for normal mode, bit 4 */
SpiaRegs.SPICCR.bit.CLKPOLARITY = 1;/* Clock polarity, bit 6, 1:Data is output on falling edge and input on rising edge.
Clock polarity, bit 6, 0:Data is output on rising edge and input on falling edge.*/
SpiaRegs.SPICTL.bit.TALK = 1; /* Master/Slave transmit enable, bit 1,*/
SpiaRegs.SPICTL.bit.MASTER_SLAVE = 0;/* Network control mode, bit 2 - SPI configured as a slave. */
SpiaRegs.SPICTL.bit.CLK_PHASE = 1;/* Clock phase select, bit 3 - 0: Data is output on the rising/falling edge
Clock phase select, bit 3 - 1: Data is output one half-cycle before the first rising/falling edge*/
/*Free run, continue SPI operation regardless of suspend*/
SpiaRegs.SPIPRI.bit.FREE = 1; /* Free emulation mode control, bit 4 = 1 */
SpiaRegs.SPIBRR = BaudRateFactor; /* Baud rate, bit */
SpiaRegs.SPIFFTX.bit.SPIFFENA = 0; /* SPI_A FIFO mode*/
SpiaRegs.SPIFFRX.bit.RXFFIENA = 1; /* SPI_A Rx Interrupt mode*/
//SpiaRegs.SPIFFRX.bit.RXFFIL = 4; /* Enable SPI_A Rx FIFO Interrupt Level*/
SpiaRegs.SPIFFCT.all= FIFOTransmitDelay;/* FIFO transmit delay*/
SpiaRegs.SPICTL.bit.SPIINTENA=1; //enable spi interrupt
SpiaRegs.SPICCR.bit.SPISWRESET = 1; /* Enable SPI*/
EDIS;
}
