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F28335 Vdda and Vddio

Chris Donovan
Prodigy 80 points

Other Parts Discussed in Thread: TMS320F28335

6.8 of the TMS320F28335 datasheet gives power sequencing requirements.  One of the requirements is that "Vddio and Vdda should always be within 0.3V of each other."

My design uses separate power rails for Vddio and Vdda.  Vddio is regulated by a switching regulator.  Vdda is regulated by an LDO (some signal conditioning circuits also use the Vdda supply, and for this reason, the use of the switcher with all of its digital loads to provide the supply was not desired).  The incoming power to the regulators is the same.  So, during steady state conditions, the supplies are always both 3.3V and meet the requirement of being within 0.3V of each other.  

The issue is during power-up and power-down.  The rise and fall of the supplies during these conditions are not completely in sync.  For example, Vdda leads Vddio slightly on power-up so that for a period of about 9ms, the difference between the two supplies exceeds 0.3V.

Is there any acceptable amount of time that the two supplies can have more than 0.3V of potential difference between them?

Or, if no time under these conditions is acceptable, does TI have any design recommendations for this issue when separate supplies are used?

Thanks in advance for your help.

  • 0
    TI__Guru 60865 points
    Hi Chris,

    The fundamental issue is that if the rails get far enough apart, one will be pulled up by the other. The diode that turns on inside the device in this case may end up carrying a significant amount of current, which could cause damage to the device if the current is high enough.

    One thing you could try to do to minimize the dangerous condition is to adjust the total capacitance on each power supply. Adding more capacitance should slow down whichever rail is ramping faster. This isn't really a guaranteed fix, but may be something you can do by only changing the components on the current board. Purely from the device perspective, it is probably better when the VDDIO rail is faster, because there won't be significant current draw on the VDDA rail until the device explicitly enables the ADC (but I am not sure how much current your signal conditioning circuitry is going to draw).

    The other thing you can do is get a pair of diodes with a turn on voltage < 0.3V, and then connect the two rails with these diodes. These shouldn't conduct any noise/ripple, but should keep the rails within an acceptable voltage delta from one another. You can probably get away with a single diode if you adjust the total supply net capacitances such that one rail ramps significantly slower.