Other Parts Discussed in Thread: CONTROLSUITE, MAX232
Hello.
I am suffering some problems in SCI and want to get some comments and help.
My goal is a serial communication between MCU[TMX320F28377D] and PC, and MCU[TMX320F28377D] and MCU[TMX320F28377D].
I am using the probee zs 10 for receiving and transmitting the data.
I set the probee zs 10, one as Coordinator and one as Router and check the communication each other, between PC and PC.
And I try to communicate between MCU[TMX320F28377D] and PC with probees, MCU[TMX320F28377D] can send a data and PC can receive it,
but when the PC send a data, MCU can not receive it. I try it between MCUs, but it failed.
I attached my code and hope your comments.
#include "F28x_Project.h" // Device Headerfile and Examples Include File
//#include "stdio.h"
#define CPU_FREQ 200E6
#define LSPCLK_FREQ CPU_FREQ/4
#define dx_baud 1
interrupt void sciaRxFifoIsr(void);
void scia_fifo_init(void);
// Global variables
Uint16 Loop_cnt;
unsigned char sdataA[20]; // Send data for SCI-A
unsigned char rdataA[2];
Uint16 rdata_pointA; // Used for checking the received data
Uint16 rxcount;
Uint32 loopcount;
void main(void)
{
rxcount = 0;
loopcount = 0;
InitSysCtrl();
InitGpio();
EALLOW;
// GPIO FOR A SCI
GPIO_SetupPinMux(28, GPIO_MUX_CPU1, 1);
GPIO_SetupPinOptions(28, GPIO_INPUT, GPIO_PUSHPULL);
GPIO_SetupPinMux(29, GPIO_MUX_CPU1, 1);
GPIO_SetupPinOptions(29, GPIO_OUTPUT, GPIO_ASYNC);
//GPIO_SetupPinOptions(29, GPIO_OUTPUT, GPIO_PUSHPULL);
EDIS;
DINT;
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.SCIA_RX_INT = &sciaRxFifoIsr;
EDIS; // This is needed to disable write to EALLOW protected registers
scia_fifo_init(); // Init SCI-A
PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
PieCtrlRegs.PIEIER9.bit.INTx1=1; // PIE Group 9, INT1
PieCtrlRegs.PIEIER9.bit.INTx2=0; // PIE Group 9, INT2
IER = 0x100; // Enable CPU INT
IER |= M_INT1; //
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
// Step 6. IDLE loop. Just sit and loop forever (optional):
for(;;)
{
SciaRegs.SCITXBUF.all= 0x03;
loopcount++;
}
}
interrupt void sciaRxFifoIsr(void)
{
Uint16 i;
rxcount++;
for(i=0;i<2;i++)
{
//while(!(SciaRegs.SCIRXST.bit.RXRDY));
rdataA[i]=SciaRegs.SCIRXBUF.all; // Read data
}
SciaRegs.SCIFFRX.bit.RXFFOVRCLR=1; // Clear Overflow flag
SciaRegs.SCIFFRX.bit.RXFFINTCLR=1; // Clear Interrupt flag
PieCtrlRegs.PIEACK.all|=0x100; // Issue PIE ack
}
void scia_fifo_init()
{
SciaRegs.SCICCR.all =0x0007; // 1 stop bit, No loopback
// No parity,8 char bits,
// async mode, idle-line protocol
SciaRegs.SCICTL1.all =0x0003; // enable TX, RX, internal SCICLK,
// Disable RX ERR, SLEEP, TXWAKE
SciaRegs.SCICTL1.bit.SWRESET = 0;
SciaRegs.SCICCR.bit.SCICHAR = 7;
SciaRegs.SCICCR.bit.LOOPBKENA = 0; // disable
SciaRegs.SCICTL1.all = 0x0003;
SciaRegs.SCICTL1.bit.RXENA = 1; // Enable
SciaRegs.SCICTL1.bit.TXENA = 1; // Enable
SciaRegs.SCICTL2.bit.TXINTENA = 0; // disable
SciaRegs.SCICTL2.bit.RXBKINTENA = 1; // Enable
SciaRegs.SCIHBAUD.all = 0x0002; // 9600 baud @LSPCLK = 50MHz (200 MHz SYSCLK).
//SciaRegs.SCILBAUD.all = 0x008B;
SciaRegs.SCILBAUD.all = 0x008A; // (200/4*10^6)/9600/8-1
SciaRegs.SCICTL1.bit.SWRESET = 1; //
PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
PieCtrlRegs.PIEIER9.bit.INTx2 = 0; // disable
PieCtrlRegs.PIEIER9.bit.INTx1 = 1; // Enable
IER = 0x100;
EINT;
}
