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Possible Bug PWM SOCB CMPC F28377D

Justin Walraven
Intellectual 300 points
Other Parts Discussed in Thread: TMS320F28377D

Hi Everyone!

I may have found a bug in the TMS320F28377D.  I am using an old revision (0 I believe), but I haven't found anything about this in the Errata.

I was trying to trigger an ADC conversion for ADCA with EPwm1 CMPC on SOC B.  For some reason, it would not work no matter what I did.  However, when I used the same commands for EPwm1 CMPD instead of CMPC, everything worked fine.  For my application, it doesn't matter if I use C or D- this is closed for me and I'm not asking for any help on this subject.  I just thought that it might be of use for you to know :).

Justin

  • 0
    TI__Mastermind 24095 points
    Hi Justin,

    Can you share the configuration code?

    -Bharathi.
  • 0 in reply to Subrahmanya
    Intellectual 300 points
    Hi Bharathi!

    I can't give you the whole thing because of company policy, but I can grab the relevant lines, as they're mostly from TI examples anyway :-). Below is working code with CMPD:

    EALLOW;
    PieVectTable.ADCA1_INT = &ADC_isr1;
    PieCtrlRegs.PIEIER1.bit.INTx1 = 1; // ADCA1_INT interrupt enable
    IER |= 1; // Enable group 0 PIE interrupts
    EINT;
    ERTM;

    EPwm1Regs.ETSEL.bit.SOCBEN = 1; // Enable SOC on B group
    EPwm1Regs.ETSEL.bit.SOCBSEL = 6; // Select SOC on up-count compare to CMPB or CMPD
    EPwm1Regs.ETSEL.bit.SOCBSELCMP = 1; // Select SOC on up-count compare to CMPD (2 stage enable to get to D)
    EPwm1Regs.ETPS.bit.SOCBPRD = 1; // Generate pulse on 1st event
    EPwm1Regs.CMPD = 0xFFFF;

    AdcaRegs.ADCSOC0CTL.bit.TRIGSEL = 6; // EPwm1 SOC B starts all 3 ADCA conversions (one after the other)
    AdcaRegs.ADCSOC1CTL.bit.TRIGSEL = 6;
    AdcaRegs.ADCSOC2CTL.bit.TRIGSEL = 6;
    AdcaRegs.ADCSOC0CTL.bit.CHSEL = 0; // 0 is for adcina0/1 diff group, 2 is for adcina2/3 diff group,
    AdcaRegs.ADCSOC1CTL.bit.CHSEL = 2; // 3 is for adcina4/5 group
    AdcaRegs.ADCSOC2CTL.bit.CHSEL = 4;

    AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 2; // EOC 2 of Adca triggers an interrupt
    AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1; // enable INT1 flag

    EDIS;

    In another interrupt, I run the following line:
    EPwm1Regs.CMPD = EPwm1Regs.TBCTR+3; // Trigger the CMPD SOC immediately

    When I run this code, I properly trigger SOCB, ADCA converts, then sends me into my ADC_isr1 with its EOC.

    If I change the code to look like this:
    EALLOW;
    PieVectTable.ADCA1_INT = &ADC_isr1;
    PieCtrlRegs.PIEIER1.bit.INTx1 = 1; // ADCA1_INT interrupt enable
    IER |= 1; // Enable group 0 PIE interrupts
    EINT;
    ERTM;

    EPwm1Regs.ETSEL.bit.SOCBEN = 1; // Enable SOC on B group
    EPwm1Regs.ETSEL.bit.SOCBSEL = 5; // Select SOC on up-count compare to CMPA or CMPC
    EPwm1Regs.ETSEL.bit.SOCBSELCMP = 1; // Select SOC on up-count compare to CMPC (2 stage enable to get to C)
    EPwm1Regs.ETPS.bit.SOCBPRD = 1; // Generate pulse on 1st event
    EPwm1Regs.CMPC = 0xFFFF;

    AdcaRegs.ADCSOC0CTL.bit.TRIGSEL = 6; // EPwm1 SOC B starts all 3 ADCA conversions (one after the other)
    AdcaRegs.ADCSOC1CTL.bit.TRIGSEL = 6;
    AdcaRegs.ADCSOC2CTL.bit.TRIGSEL = 6;
    AdcaRegs.ADCSOC0CTL.bit.CHSEL = 0; // 0 is for adcina0/1 diff group, 2 is for adcina2/3 diff group,
    AdcaRegs.ADCSOC1CTL.bit.CHSEL = 2; // 3 is for adcina4/5 group
    AdcaRegs.ADCSOC2CTL.bit.CHSEL = 4;

    AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 2; // EOC 2 of Adca triggers an interrupt
    AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1; // enable INT1 flag

    EDIS;

    In another interrupt, I run the following line:
    EPwm1Regs.CMPC = EPwm1Regs.TBCTR+3; // Trigger the CMPC SOC immediately


    ADCA does not convert and consequently cannot generate EOC to send me into the interrupt.

    Is this enough?

    Justin

    e2e.ti.com/.../515813