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F28335 variable timer interrupt period



Hi,

I have an assembly program with a task running on the CPU T2 interrupt. T2 period is set to 999 which should, at 150MHz,  result with interrupt period of 6.6666667us. Instead I measure (by toggling GPIO56 on the T2 task and watching it with scope) variable periods of 6.62us, 6.66us, 6.67us, 6.68us, 6.70us. I tried putting a breakpoint on the beginning of my T2 ISR and have observed TIMER2TIM register content: 977, 980, 983. My code is running from internal flash of the F28335 (eZdsp board). Controller is waiting for the interrupt in an empty loop.

To eliminate errors in my code, I tried running TIs example from C2833x/C2823x C/C++ Header Files and Peripheral Examples. I modified cpu_timer example by setting T2 period to 6.6666667 and adding code to toggle GPIO56 in T2 ISR (as in gpio_toggle example). Here again I measured variable interrupt period ( 6.66us and 6.69us) and observed different values in the TIMER2TIM register on start of ISR ( 978, 979, 980, 981).

Can anyone explain this behavior?


Josip

  • okay ... I am really rusty on this but I believe this is resulting from interrupt latency. I believe the latency can vary depending on the operation. It looks like your experiment is showing a difference of 0.03uS which is about .5%. I am not sure about your instrumentation setup but this level of error can result from instrumentation as well. I suggest you go through the exact steps of an interrupt operation to determine the possible latency and the source of variable timing. May be TI will offer a better clarification.

  • I'm pretty confident in the 1GHz Agilent MSO6104A scope I'm using. Besides, instrumentation fault would not explain different values in TIMER2TIM register I observed.


    Josip

  • Josip Babic said:
    I tried putting a breakpoint on the beginning of my T2 ISR and have observed TIMER2TIM register content: 977, 980, 983. My code is running from internal flash of the F28335 (eZdsp board). Controller is waiting for the interrupt in an empty loop.

    Try putting the CPU into an idle state within the loop.  For example: asm("    IDLE").  This way the CPU is in the same state everytime the interrupt comes in.  Otherwise it may be in the process of executing a branch instruction which will hold off the interrupt.

    Regards,

    Lori

  • Thank you,

    Arefeen for the suggestion and Lori for resolving my dilemma.

     

    Kind regards,

    Josip