CLA matrix multiplication in the ISR interrupt

Tihomir Zilic said:

But I couldn't do it and I am not sure why this happens, I want to figure out it.

What happens or doesn't happen?  Have you tried the example as it is?

Tihomir Zilic said:

My question is: can I start CLA matrix multiplication in my ISR interrupt routine, or I can do it only in the main loop of the processor (not in the processor's interrupt ISR routine) as your example "cla_matrix_mpy" shows?

A CLA task can be started by the main CPU at any place in the code.  It can be within a C28x ISR or within the main loop.  

Thank you for the answer!

I implemented the code from "cla_matrix_mpy" example into my example. I started CLA_runTest( ) in my ISR routine and this routine works normally. The problem is that I can not get the matrix z as a result of 3x3 x and y matrix multiplication.

I have figured out that the problem could be connected to CPU1RAM data memory, because if I set in the memory configuration function "CLA_configClaMemory() " the row with  MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS5 =1;  to 0,  then I can see x,y matrices in the CSS Expressions window as they should be, but z is still zero.

Also, there are some warnings:

"#10247-D creating output section "Cla1ToCpuMsgRAM" without a SECTIONS specification#

#10247-D creating output section "CpuToCla1MsgRAM" without a SECTIONS specification

Do you have any suggestion what could I try to get the matrix z?

Thank you!

Dear Vishal_Coelho,
connecting to the previous question, a new question arose to me. The CLA matrix multiplication (dimension of matrices x and y from the example is 3x3) now works and works also when I define matrices elements to float (from uint32_t that were defined in the example). But my real problem is to multiply matrices and vectors defined as A*x, B*u, C*x, D*u where dimensions of matrices and vectors are as follows:

#define N 7
#define M 2
#define K 1
extern float A[N][N]; //NxN matrix A
extern float B[N][M]; //NxM matrix B
extern float C[K][N]; //KxN matrix C
extern float D[K][M]; //KxM matrix D
extern float x[N], u[M], y[K];

It works for N=5 and less, but for N=7 I get error message that:
"#10099-D program will not fit into available memory.  run placement with alignment/blocking fails for section "CpuToCla1MsgRAM" size 0xa2 page 1.  Available memory ranges:"

My question is: could I somehow expand memory that would program fits in? Or maybe to distribute different matrix multiplications to other CLA tasks (from 1-8)?

Thanks!

Looks like you cant fit all these matrices in the CpuToCla1MsgRAM, that message ram is max 0x80 words. Since this is the 2837x, you can assign these matrics to any of the LSx RAMs and the C28x should hae read access to it by default. So for example, i could assign these to RAMLS5 using the #pragma and then configure RAMLS5 to be a data RAM for the CLA (in the MemCfgRegs)

Dear Vishal_Coelho,

I did as you suggested and it was successful!

First in my .c code I defined all my matrices and vectors with new memory sections using #pragma as follows:
#pragma DATA_SECTION(A, "newRAM")
float A[][N];
#pragma DATA_SECTION(B,"newRAM")
float B[N][M];
#pragma DATA_SECTION(C,"newRAM")
float C[K][N];
#pragma DATA_SECTION(D,"newRAM")
float D[K][M];
#pragma DATA_SECTION(x,"CpuToCla1MsgRAM")
float x[N];
#pragma DATA_SECTION(y,"Cla1ToCpuMsgRAM")
float y[K];
#pragma DATA_SECTION(u,"CpuToCla1MsgRAM")
float u[M];
#pragma DATA_SECTION(dx,"Cla1ToCpuMsgRAM")
float dx[N];
#endif //__cplusplus

Then I defined a "newRAM" in the linker file I use 2837xD_RAM_CLA_lnk_cpu1.cmd  putting text   newRAM   : > RAMLS4, PAGE=0 bellow the comment  

/* CLA specific sections */  . 

And then in my .c file under the function void CLA_configClaMemory(void) I put the following code :

  // I added this two line bellow to expand CLA memory usage to LS4RAM
    MemCfgRegs.LSxMSEL.bit.MSEL_LS4 = 1; //CLA is owner
    MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS4 = 0; //data block

Sincerely!

Best regards!