Other Parts Discussed in Thread: CONTROLSUITE
Hi,
I am looking at this datasheet. I am using an F28377S LaunchPad rev. C with the epwm_updwon_aq_cpu01 controlSUITE example. The code uses this for EPWM1:
GpioCtrlRegs.GPAPUD.bit.GPIO0 = 1; // Disable pull-up on GPIO0 (EPWM1A) GpioCtrlRegs.GPAPUD.bit.GPIO1 = 1; // Disable pull-up on GPIO1 (EPWM1B) GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // Configure GPIO0 as EPWM1A GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1; GpioCtrlRegs.GPAPUD.bit.GPIO2 = 1; // Disable pull-up on GPIO2 (EPWM2A) GpioCtrlRegs.GPAPUD.bit.GPIO3 = 1; // Disable pull-up on GPIO3 (EPWM2B) GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; // Configure GPIO2 as EPWM2A GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1; // Configure GPIO3 as EPWM2B
Page 9 of the aforementioned datasheet says that PWM1 is muxed with GPIO2-3 which according to the code example is EPWM2. From testing it seems that the EPwm2Regs configuration is working for those pins (J8-80, J8-79). The datasheet says that these are EPWM1 though and that EPWM2 does not have a pinout.
Is there an issue with the code, the datasheet (it's wrong or I have the wrong one) or my understanding of what's going on?