32 Bit load of a M3 register with an immediate value on a F28M35

Found out that invoking the assembler armcl with the -mv7M3 option enables recognition of the MOVT instruction but sill vexed with the problem of using a label in the #imm16 field when the label is defined in a header file as a 32 bit address. What's the work around?

Kim,

I used the below code to read the MRESC register on Concerto M3. I wish we had the 32 bit load as you said.

; ldr r0, =(SYSCTL_RESC) ;read MRESC register - 0x400FE05C

movw r0, #(SYSCTL_RESC & 0xffff)
movt r0, #(SYSCTL_RESC >> 16)
ldr r1, [r0], #0
TST r1, #0x02 ; Test is bit 1 ((POR)) is set.
beq _USER_FUNC_   ; branch to _USER_FUNC on non POR reset.

Hope this helps.

Best regards

Santosh Athuru

Thanks Santosh! That set of instructions allows me to load immediate values represented by symbols defined in a header file but how do you load a 32 bit address into a register with a symbol representing a relocatable RAM location that's defined in another routine allocating RAM? The TI assembler errors out with an "Expression must evaluate to an absolute constant" What's the work around? Thanks for your help

Santosh, I think I might have found a possible solution. I added an ".include "ram_28M35x_M3.asm" to the file I was trying to assemble where this include file contained the definition of the relocatable variable whose symbol was defined using a .bss in the ram_28M35x_M3.asm file. It eliminated the warning and error messages I was getting on the routine I was trying to assemble but do you think this will plug in the correct ram address of the relocatable variable on linking?

yes, just like the register variables are defined you will have to define a variable and assign it to RAM (sections) and have a RUN/LOAD linkage. I guess you are doing that now.

Best Regards
Santosh Athuru