F28069M CLA Controls ePWM Issues

Yes, everything works well in c28, I just ported the current control loop to CLA.

My CCS version is 6.1.3.00034, I bet the CLA compiler is the latest as well.

The definition of Bool is basically an enum, 0 for False, 1 for True.

I tried hard code the value of the variable but still unsuccessful.

Thanks for your support.

I would try adding this before the if statement:

while (btn1Closed != True);
if ((engageCmd == MTR_DISENGAGE) || (btn1Closed == True)) {
// ...

that way, you know for sure, if it gets past the while loop, then btn1Closed is == True and it should not go to the else part of the if statement.

I would also try changing the type of btn1Closed to Uint16 and explicitly setting to 0 or 1 and checking if == to 0 or 1.  This would ensure that it's not a typedef problem with the CLA.

I took your suggestion to change the type of btn1Closed to Uint16, but it still jumps incorrectly.

From the screenshot, you can see that the variable btn1Closed was 1 when the CLA task is halted. Supposedly, the execution should branch to line 178, but it went to line 183.

Any advice on this issue and the PWM issue would be much appreciated!

Please step through several lines before the actual value of btn1Closed is updated.  You may want to move your __mdebugstop() to somewhere after the if statement.
Refer to this document:
processors.wiki.ti.com/.../Control_Law_Accelerator_(C2000_CLA)_Debug_on_CCS_FAQ

Specifically, the question "If I halt before an instruction, I have to step the CLA multiple times before I see the result of the instruction. Why is this?"

It may be that btn1Closed is actually 0, even though it shows as 1 in the watch window, and will not update until you step through a few more lines.

My code project worked in C28 architecture, the only changes are porting the current control loop to CLA. The hardware is TI's TMDSHVMTRPFCKIT. 

Below are the configurations of CLA, ePWM, GPIO.

//CLA configuration

void InitCLA1(void)

{

EALLOW;

// Compute all CLA task vectors

Cla1Regs.MVECT1 = (Uint16)((Uint32)&Cla1Task1 - (Uint32)&Cla1Prog_Start);

Cla1Regs.MVECT2 = (Uint16)((Uint32)&Cla1Task2 - (Uint32)&Cla1Prog_Start);

Cla1Regs.MVECT3 = (Uint16)((Uint32)&Cla1Task3 - (Uint32)&Cla1Prog_Start);

Cla1Regs.MVECT4 = (Uint16)((Uint32)&Cla1Task4 - (Uint32)&Cla1Prog_Start);

Cla1Regs.MVECT5 = (Uint16)((Uint32)&Cla1Task5 - (Uint32)&Cla1Prog_Start);

Cla1Regs.MVECT6 = (Uint16)((Uint32)&Cla1Task6 - (Uint32)&Cla1Prog_Start);

Cla1Regs.MVECT7 = (Uint16)((Uint32)&Cla1Task7 - (Uint32)&Cla1Prog_Start);

Cla1Regs.MVECT8 = (Uint16)((Uint32)&Cla1Task8 - (Uint32)&Cla1Prog_Start);

// All tasks are enabled and will be started by SW trigger

Cla1Regs.MPISRCSEL1.bit.PERINT1SEL = CLA_INT1_NONE;

Cla1Regs.MPISRCSEL1.bit.PERINT2SEL = CLA_INT2_NONE;

Cla1Regs.MPISRCSEL1.bit.PERINT3SEL = CLA_INT3_NONE;

Cla1Regs.MPISRCSEL1.bit.PERINT4SEL = CLA_INT4_NONE;

Cla1Regs.MPISRCSEL1.bit.PERINT5SEL = CLA_INT5_NONE;

Cla1Regs.MPISRCSEL1.bit.PERINT6SEL = CLA_INT6_NONE;

Cla1Regs.MPISRCSEL1.bit.PERINT7SEL = CLA_INT7_NONE;

Cla1Regs.MPISRCSEL1.bit.PERINT8SEL = CLA_INT8_NONE;

Cla1Regs.MIER.all = (M_INT2 | M_INT1); //enable CLA1 Task 1 and Task 2 only

// Switch the CLA program space to the CLA and enable software forcing

Cla1Regs.MMEMCFG.all = CLA_PROG_ENABLE|CLARAM0_ENABLE|CLARAM1_ENABLE|CLARAM2_ENABLE|CLA_RAM1CPUE;

Cla1Regs.MCTL.bit.IACKE = 1;       //enable IACK feature

EDIS;

}

//ePWM configuration

#define EPWM1_AQCTLA_INIT 0x0060        //CAU = 10, CAD = 01

void InitEPwm1(void)

{

EPwm1Regs.TBCTL.bit.CTRMODE = TB_FREEZE; // Disable the timer

EPwm1Regs.TBCTL.all = EPWM1_TBCTL_INIT; // Configure timer control register

EPwm1Regs.TBCTR = 0x0000; // Clear timer counter

EPwm1Regs.TBPRD = PWM_HALF_PERIOD; // Set timer period

EPwm1Regs.TBPHS.half.TBPHS = 0x0000; // Set timer phase

EPwm1Regs.CMPCTL.all = EPWM1_CMPCTL_INIT; // Compare control register

EPwm1Regs.AQCTLA.all = EPWM1_AQCTLA_INIT; // Action-qualifier control register A

EPwm1Regs.AQSFRC.all = EPWM1_AQSFRC_INIT; // Action-qualifier s/w force register

EPwm1Regs.AQCSFRC.all = EPWM1_AQCSFRC_INIT; // Action-qualifier continuous s/w force register

EPwm1Regs.DBCTL.bit.OUT_MODE = DBA_DBB_EN; // Deadband is fully enabled

EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary

EPwm1Regs.PCCTL.bit.CHPEN = CHP_DISABLE; // PWM chopper unit disabled

// Set up ADC SOC Trigger by EPWM1 period event

EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable SOCA

EPwm1Regs.ETSEL.bit.SOCASEL = SOC_TBCTR_ZERO; // Enable CNT_ZERO event for SOCA

EPwm1Regs.ETPS.bit.SOCAPRD = EPWM_INT_2ND_EVENT;// Generate SOCA on the 2nd event

EPwm1Regs.ETCLR.bit.SOCA = 1; // Clear SOCA flag

}

//GPIO configuration

GpioCtrlRegs.GPAMUX1.bit.GPIO0 = GPIO0_MUX_EPWM1A; // 0=GPIO, 1=EPWM1A, 2=Resv, 3=Resv

GpioCtrlRegs.GPAMUX1.bit.GPIO1 = GPIO1_MUX_EPWM1B; // 0=GPIO, 1=EPWM1B, 2=Resv, 3=COMP1OUT

GpioCtrlRegs.GPAMUX1.bit.GPIO2 = GPIO2_MUX_EPWM2A; // 0=GPIO, 1=EPWM2A, 2=Resv, 3=Resv

GpioCtrlRegs.GPAMUX1.bit.GPIO3 = GPIO3_MUX_EPWM2B; // 0=GPIO, 1=EPWM2B, 2=SPISOMI-A, 3=COMP2OUT

GpioCtrlRegs.GPAMUX1.bit.GPIO4 = GPIO4_MUX_EPWM3A; // 0=GPIO, 1=EPWM3A, 2=Resv, 3=Resv

GpioCtrlRegs.GPAMUX1.bit.GPIO5 = GPIO5_MUX_EPWM3B; // 0=GPIO, 1=EPWM3B, 2=SPISIMO-A, 3=ECAP1

Thank you for your continuing support!

In your .cla file, make sure F2806x_Cla_typedefs.h is included before your device or project header file. Your .cla file should be the only one including that CLA typedefs header file.

For example, I only have

#include "F2806x_Cla_typedefs.h"        /* F2806x CLA type definitions                                                */
#include "F2806x_Device.h"              /* F2806x header file peripheral address definitions                          */
#include "CLAmath.h"                    /* CLA math header file                                                       */
#include "CPUCLACommon.h"               /* Header file for common CPU/CLA definitions                                 */

in my .cla file, and it doesn't include the project header file

and all other .c files simply have

#include "Project.h"                             /* Main include file                                                  */

where Project.h has

#include "F2806x_Device.h"              /* F2806x header file peripheral address definitions                          */
#include "F2806x_DefaultIsr.h"          /* ISR definitions                                                            */
#include "IQmathLib.h"                  /* IQ math header file                                                        */
#include "C28x_FPU_FastRTS.h"           /* Fast RTS header file                                                       */
#include "CPUCLACommon.h"               /* Header file for common CPU/CLA definitions                                 */