This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

High Level Design Advice: Reading, processing, and storing data from external ADC (parallel interface) using MCU

Other Parts Discussed in Thread: TMS320F28075, ADS8422

Hardware:

MCU: TMS320F28075 Piccolo Microcontroller

ADC: ADS8422 (Up to 4MSPS, parallel interface)

Requirements:

Read in parallel ADC data at >2MHz, and execute some sort of decimating filter before storing data. 

I'm looking for high level advice regarding which functionality of the MCU is best suited for this task. I'm thinking that using the CLA (control law accelerator) is appropriate as that way the main CPU will still be available to service other interrupts and will not be constantly trying to keep up with the data input. Any advice or example code would be greatly appreciated.

  • Hello Matt,

    Matt Bossart said:

    Hardware:

    MCU: TMS320F28075 Piccolo Microcontroller

    ADC: ADS8422 (Up to 4MSPS, parallel interface)

    Requirements:

    Read in parallel ADC data at >2MHz, and execute some sort of decimating filter before storing data. 

    I'm looking for high level advice regarding which functionality of the MCU is best suited for this task. I'm thinking that using the CLA (control law accelerator) is appropriate as that way the main CPU will still be available to service other interrupts and will not be constantly trying to keep up with the data input. Any advice or example code would be greatly appreciated.

    The CLA would be a good candidate but (there is always a but) it does not have direct access to the EMIF on F28075.  You could use the DMA to grab the data, but the DMA cannot trigger the CLA.  If you can process the data on a block basis (instead of single-sample processing), maybe you could use the DMA to buffer a number of data points.  The DMA could then trigger a CPU interrupt when a buffer is ready for processing, and the CPU could trigger the CLA to process the data.  That way, the CPU is not taking an interrupt very often, and the CLA does the processing.
    Alternately, you could interface the ADC using GPIO and bit-bang the interface using the CLA.  The CLA does have access to the GPIO data regs.
    Finally, have you thought about moving up to the F28376S, and using the on-chip ADCs in 16-bit differential mode?  In 16-bit mode, max sampling rate is 1.1 MSPS, so you would have to use two ADCs, and trigger them 180 degrees out of phase.  This would give you up to 2.2 MSPS on a single channel.  The CLA could directly access the ADC results.  This is a very clean solution, assuming the ADC performance is sufficient for whatever it is you are doing.
    Regards,
    David