Delfino TMS320F2837xD "Dual Core for Dummies?"

Hi Ken,

Yes, this definitely helps.  Thank you.

In particular, I note that the following modules are pretty good on the Dual Core details:

• C28xm03:  header file config, m04 dual core interrupts, m05 system clock and control registers and m10 Flash and System design.

Thanks again for passing this along.

-Chris

Thanks Chris.  Please be sure to check out module 11 - "Dual-Core Inter-Processor Communications".  I will close this thread.

- Ken

Hi Ken,

Just a couple of curiosity questions, at an even higher level, if I may please. Generally, would customers still develop using a single CCS project (for Dual core designs)? And per the training material, although the Boot process looks quite configurable (dual cores) it looks like booting with 2 CPU's allows flexibility where the user can choose to boot from either. Lastly, I think from a TI Dual core device perspective, I'd expect that many use an ARM for general purpose and the DSP part of the dual core is often used by a math library to offload the math to the DSP. All sound consistent with your understanding too?

Thanks,
Chris

Chris,

No problem with the questions.  If a customer is interested in designing with a single core (which has a single CCS project) then it would be cost effective to use a single-core device, such as the F2837xS rather than a F2837xD.  As for the boot process, CPU1 is the master and needs to boot first.  The workshop is based on the F2837xD dual-core device since it gives us flexibility to create lab exercises for both single and dual-core using the same target board.  Your thinking is correct that some dual-core devices would have a core optimized for general-purpose processing and a core optimized for math - and we do have a family like this under the F28M3x devices.  However, the F2837xD family has two cores optimized for math and it can be used in advanced control systems where one core could be used to track speed and position, while the other core is used to control torque and current loops, as an example.  If you would like to learn more, please reference my paper "The TMS320F2837xD Architecture: Achieving a New Level of High Performance" - SPRT720.  I hope this helps.

- Ken

Hey Ken,

Sorry to keep this thread going when we've already Answered it and essentially closed it out.  The customer is very interested in transitioning from their older F28335 to the newer  F2837xS and F2837xD Delfino devices.  They are trying to compare the solutions for any major differences.  For the most part, the  F2837xS/F2837xD offer equal to or even greater in terms of performance, I/O, serial/USB type interfaces, etc.  

We are aware of the ADC differences (12b Dual on F28335 vs. 16b Single S/H on F2737xx) but wondered about anything else that was considered a 'takeaway'.

Are the SIN/COS/etc tables still available in ROM like it is on the F28335?  Is there potentially MORE capability in ROM with the  F2837xS/F2837xD?

The following comparison Table is helpful, but we'd appreciate any further comments you might have.

Thanks again,

Chris

Chris,

  One note about the CAN module. 28335 has the eCAN. 28377x has the DCAN. While both are CAN 2.0B compatible, the programming model for these 2 modules are completely different. Meaning, they have different register/bit structures/functionalities. So, you cannot port eCAN code to DCAN. The CAN drivers have to be re-written.

Chris,

No problem about the additional questions.  There is a more important difference with the ADCs.  The F2833x uses a SEQ-based (sequencer) ADC and the F2837x uses a SOC-based ADC (start of conversion).  The F2833x has dual S/H to time-share the ADC and make it "look" like two ADCs, whereas on the F2837x we have four ADCs and each has its own S/H, so effectively we can have up to four independent ADCs operating simultaneously.

I don't think we have the sine/cosine tables in the boot ROM, but I think we have them in the CLA Data ROM, which is where we typically run the high performance floating-point math.  I am in the process of working on a migration guide from the F2833x to F2837xS, but mostly in my free time, so it will be awhile before it's available.  If it helps, I have created the following table to highlight some of the differences between the two device families:

Feature	F2833x	F28x7x	Notes
CPU	C28x+FPU	C28x+FPU+TMU+VCU-II	No VCU on F2807x
CLA	n/a	CLA (type 1)
IPC	n/a	F2837xD only
Clocking	XCLKIN/X1+X2	XCLKIN/X1+X2/OSC1/OSC2
Reset		Added POR, RESC, Hibernate
Peripheral reset	Part of peripheral	Per. S/W reset register
PLL	DIV=4-bits DIVSEL=2-bits	IMULT=7-bits FMULT=2-bits DIVSEL=6-bits
Bootloader	4 GPIO pins	RAM (emulation boot) or OTP (stand-alone boot)
Watchdog		Added min. window check
PIE	12x8=96	12x16=192
GPIO	GPIO + 3 peripherals options per pin	GPIO + 12 peripheral options per pin	F28x7x group MUX
X-Bar	n/a	Input/Output/Pwm
Ext. Interface	XINT	EMIF
Ext. Interrupts	7 mapped via GPIO	5 mapped via Input X-Bar
Low Pwr Modes		Added Hibernate
LP wakeup	GPIO 0-31	GPIO 0-63
Lock registers	n/a	29 registers
ADC	SEQ-based – 2 S/H	SOC-based – 1 S/H (12/16 bit)	F28x7x up to 4
Buffered DAC	n/a	3
CMPSS	n/a	8 each with 2 DACs
SDFM	n/a
ePWM	Type 0	Type 4
HRPWM	Type 0	Type 2
eCAP	Type 0	Type 0	Same (via X-Bar)
eQEP	Type 0	Type 0	Same
DMA	Type 0	Type 0 – additional triggers
Memory	Need to cover differences including BROM/tables (no IQmath on F28x7x)
Code Security	CSM (pswd in Flash)	DCSM (pswd in OTP)
SCI	Type 0	Type 0	Same
SPI	Type 0	Type 2
McBSP	Type 1	Type 1	Same
I2C	Type 0	Type 0	Same
CAN	eCAN Type 0	CAN Type 1
USB	n/a	Type 0

- Ken

Chris,

Also, I forgot to include this - the F2833x is a 12-bit converter and the F2837x is a 16/12-bit converter.  I wanted to make you aware that the F2837x ADC operates in two different modes; 12-bit or 16-bit.  In 12-bit mode it is single-ended (uses one input) and in 16-bit mode it is differential (uses two inputs).

- Ken