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F2809 Power Sequencing

Brian Fortman
Expert 7650 points


From a customer:

Concerning the power up sequence for the VDDio and VDDcore.

Is there no absolute requirement for sequencing the rails of the F2809?  Based on observations, there is no absolute requirement for sequencing, however if VDDio comes up before VDDcore, then the I/O pins can be in an undefined state until VDDcore is stable.

 

(1)   Can you confirm this interpretation?

(2)   Is this irrespective of the state of the RESET input?

  • 0
    TI__Guru 61235 points

    Brian,

    The customers interpretation is correct.  He is citing the datasheet SPRS230n, p.106:

    Basically, it is saying from a reliability/lifespan perspective, there are no power sequencing requirements.  But, the GPIO pins could glitch/drive while powering up if you do not follow the sequencing of Vdd first, followed by Vddio as described above.

    I'm not sure what is being asked about "irrespective of the state of the RESET input."  There are requirements on the RESET pin as described above.  RESET would certainly have to be asserted if the Vdd was not at 0.7V!

    Regards,

    David