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ADC Device Cal with unprecise Calibration values?

andreas von kaenel
Genius 4925 points
Other Parts Discussed in Thread: TMS320F28027

Hi all,

I am working on a tms320f28027. While commissioning of my HW, I recognized, that my ADC is obviously poor calibrated. Although the Device_Cal function was called, and there are values written into the Trim Regs of the ADC , the converted values are beyond ADC specifications. Anybody an idea what might have gone wrong?

Best regards

Andreas

see attached full range ADC conversion values

5270.ADCCalibration.pdf

 

  • 0
    TI__Guru* 81500 points

    Andreas,

    Are you making sure to discard the 1st sample in a series of samples according the the errata? 

    http://focus.ti.com/lit/er/sprz292c/sprz292c.pdf

    The 1st sample error would certainly skew the ADC results out of spec.  If you have accounted for this, let me know and we will proceed with debug.

    Best,

    Matthew

  • 0 in reply to MatthewPate
    Genius 4925 points

    Matthew,

    Thanks for your reply - I effectively did not respect the errata. However, the sample I am looking at is not the 1st in my series but the 5th. I did now change the code, so that the 1st sample is discarded, and things look a little bit better, which seems weird to me. Why should the 5th sample be more accurate when I discard the first?

    Regards,

    Andreas

     

  • 0 in reply to andreas von kaenel
    TI__Guru* 81500 points

    Andreas,

    Assuming you are keeping the ADC running from 1st to the 5th sample, I agree this should have not impacted your data.  Just to confirm are you triggering 5 conversions from the same trigger, or if not are you sure the ADC is never stopped before subsequent SOC triggers are received?

    How much better is your data with the new proceedure, i.e. is it within spec?  Also can you comment on the signal source, is is DAC or resistor divider or other?  I would also like to make sure the signal source is stable and driven properly when sampled if you are still seeing issues.

    One experiment to try would be to sample the same channel multiple times and note the results.  From ADC idle you should observe the 1st sample error compared to samples N+1 and beyond.  Also if there is settling issue with the input you will also see the results converge to some steady state as well.

    Best,

    Matthew