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TMS320F28075 sine wave generation as Dither Frequency

Other Parts Discussed in Thread: TMS320F28075, CONTROLSUITE

Hello,

I am working on TMS320F28075.

I have generated a PWM of 50k Hz.Now for one of my application i need to generate a Dither Frequency(50Hz) using Sine wave so that i can add to my PWM and get the Dither Added PWM .

I have already referred Sine wave generation Documents from Controlsuite (C:\ti\controlSUITE\libs\dsp\SGEN\v101) and saw the example codes there.But i am not able to understand from where or which pin i can monitor the sinewave.

After Generating how to superimpose the sinewave with the PWM?

Regards,

Sanath Rai

  • Hi sanath,

    Let me get you right, in short do you want to generate a SPWM wave at 50 Hz?

    Regards,
    Gautam
  • Sanath,

    Having generated your 50kHz PWM you must have some variable in your program which modulates the duty cycle by writing to the CMPx register.  It is to this variable you must add the dither output generated by the SGEN library.

    You could use SGENT_1, in which case you would normally compute the dither signal from your ISR as shown in the User's Guide example:

    sgen.calc(&sgen);
    x1=sgen.out;

    You select the amplitude of x1 using the .gain element in the SGENT_1 structure.  Once you have x1 you simply add it to your duty cycle control variable and write that to CMPx.  It would be a good idea to do some bounds checking on the compare value to make sure it doesn't under-flow or exceed the period register setting.

    Regards,

    Richard

  • Hello Gautham,

    Yes you are right.I need a sine wave of 50 hz after that need to superimpose that with my 50kHz PWM.

    Regards,

    Sanath Rai

  • Hello Richard,

    Thank you for the Suggestion.
    i Will work on that.


    Regards,
    Sanath Rai
  • Hello Richard,


    I have intergrated the SGEN module to my project and have written code to generate sinewave of 50Hz and added
    the x1 ((sgen.calc(&sgen); x1=sgen.out;)which is the ouput generated to my dutycycle variable.

    Below is the code of adding the x1 to dutycycle variable

    ePWM_Set_Duty(ePWM_e ePwmNum, Uint16 DC_A, Uint16 DC_B) is my function to generate the PWM

    DC_A and DC_B are dutycycle variables

    void ePWM_Set_Duty(ePWM_e ePwmNum, Uint16 DC_A, Uint16 DC_B)
    {

    HSPWM_en = (*ePWM).HRPCTL.bit.HRPE;

    if(!HSPWM_en)
    {
    Period = (*ePWM).TBPRD;

    Res = Period/1000;

    (*ePWM).CMPA.bit.CMPA = (Res * (DC_A + x1)); // Res * DC_A;    //x1 is the sgen.out added to CMPx
    (*ePWM).CMPB.bit.CMPB = (Res * (DC_B + x1)); //Res * DC_B;


    }


    PWM is in UP_DOWN count Mode.

    the sgen code is written inside a timer interrupt ISR


    __interrupt void cpu_timer0_isr(void)
    {
    CpuTimer0.InterruptCount++;

    sgen.calc(&sgen);
    x1=sgen.out;

    // Acknowledge this __interrupt to receive more __interrupts from group 1
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
    }

    1) Still i cannot see the added frequency(50Hz) to my PWM (50kHz)in Oscilloscope.

    2) How to validate whether dither frequency is added or not?  

    3) In my timer ISR for every 500ms a sample (x1=sgen.out)is been generated .how to feed the each sample at real time to PWM?

    4) Any synchronization is needed?

    I have referred the following example code from the SGEN document

    The following pseudo code exemplifies, 50Hz single channel digital SIN signal generation
    using SGENT_1 module.
    #include <sgen.h>
    SGENT_1 sgen=SGENT_1_DEFAULTS;
    int x1;
    main ( )
    {
    sgen.offset=0;
    sgen.gain=0x7fff; /* gain=1 in Q15 */
    sgen.freq=5369; /* freq = (Required Freq/Max Freq)*2^15 */
    /* = (50/305.17)*2^15 = 5369 */
    sgen.step_max=1000; /* Max Freq= (step_max * sampling freq)/65536 */
    /* Max Freq = (1000*20k)/65536 = 305.17 */
    }
    void interrupt isr_20khz()
    {
    sgen.calc(&sgen);
    x1=sgen.out;
    }




    Regards,
    Sanath Rai

  • Sanath,

    2) How to validate whether dither frequency is added or not?
    >> If I were you I would monitor the variable x1 to verify the signal you expect is actually there. You can do this in the CCS watch window, or if you prefer, set up a data buffer to log x1 and view it in a graph window. Check it has the numerical range you expect.

    3) In my timer ISR for every 500ms a sample (x1=sgen.out)is been generated .how to feed the each sample at real time to PWM?
    >> What you're doing, except that users typically set the PWM duty cycle inside an ISR so the updates happen at deterministic times. Take a look at when your ePWM_Set_Duty() function is being called to ensure it is happening regularly and when you expect. Otherwise your method of adding x1 looks OK.

    4) Any synchronization is needed?
    Apart from calling ePWM_Set_Duty() regularly, no.

    Regards,

    Richard
  • Hello Richard,

    Thanks for the reply and valuable suggestions.

    Now i am able to monitor the x1 value in my watch window varying from (0-16000, - -16000, -16000 - 0) as i have set the amplitude (.gain) to 16000.

    After getting the x1 value i am adding it to the dutycycle variable and wrote that to CMPx register ( i am calling the ePWM_Set_Duty() inside the ISR for every

    50us(20KHzISR) ).

    The remaining issues are

    1)As the period register setting ,getting overflowed(out of range after x1 is added) i am unable to get continuous dither added PWM pulses as i observed in Oscilloscope.

    2)How to manage the period register setting not to overflow when i add the gain 16000 to my dutycycle variable which is written into CMPx register?

    Period = (*ePWM).TBPRD;

    Res = Period/1000;

    (*ePWM).CMPA.bit.CMPA = (Res * (DC_A + x1)); // Res * DC_A;   

     

    3)Do i need to change the duty cycle generation function in software PWM driver?

    Regards,

    Sanath Rai

  • Sanath,

    Glad to know you're making progress. 

    Dither is typically a very low amplitude signal, added to reduce mechanical friction or quantization noise.  I thought the duty cycle might vary in the range 0 - prd, but the much smaller dither is normally super-imposed on the duty cycle.  In any case, as I mentioned in my first post, you're going to need to do some bounds checking to clamp the (duty + dither) sum so it doesn't over-flow or under-flow.  Something like:

    duty = Res * (DC_A + x1);

    duty = (duty > period) ? period : duty;

    duty = (duty < 0) ? 0 : duty;

    Sorry, I'm not following your third question very well.  If you are updating the compare register inside an ISR that's all that's necessary. 

    Regards,

    Richard

  • Hello Richard,

    Thank you for your Inputs and Suggestions.

    I have managed to achieve the expected output by varying the .gain of SGEN module and can vary the dither frequency from 50-200Hz as required to my application with gain( amplitude) 30mv max.

     If i increase the amplitude above 30mv it is going out of range.

    But still not able to figure out how to clamp(dither+duty)sum for higher Dither Amplitude signals.

    Regards,

    Sanath Rai