This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Size RFFT-ADC Example on F28335

Hi all,

I'm doing a project that use FFT. I have been working with the example from FPU library ("2833x_RFFT_ADC_RT") and the result is very good with 512 samples but when I change stages number to 11 (2^11=2048) I have this error:

line 127: error:
program will not fit into available memory. run placement with
alignment/blocking fails for section ".ebss" size 0x3089 page 1. Available

memory ranges:
>> Compilation failure
RAML2 size: 0x1000 unused: 0x1000 max hole: 0x1000
warning: entry-point symbol other than "_c_int00" specified: "code_start"
error: errors encountered during linking; "2833x_RFFT_ADC_RT.out" not built

How could I fix this?. I don't have experience in memory management but I think there is space avaliable because when I compile ("2833x_RFFT") project and I change size fft to 2048 works fine.

Thank you for any suggestion,

Jonatan

  • Hi Jonatan,

    Jonatan Vanegas said:
    line 127: error:
    program will not fit into available memory. run placement with
    alignment/blocking fails for section ".ebss" size 0x3089 page 1. Available

    .ebss is too large to fit in any memory, you will exssentially have to club together some of the RAM blocks to fit this section

       RAML0L3     : origin = 0x008000, length = 0x004000



    Comment out the definitions for RAMs L1,L2,L3 if you are doing the above.

    Then just allocate .ebss to this new memory block.

  • Hi Vishal

    Thanks for you reply,

    I did what you said and It helped me a lot. I have other question about proccesing. In this example, I am working with 10,24 kHz sampling frequency, namely I have 1/10,24Khz=97us for The CPU computes 2048 Point FFT before next 2048 samples fill buffer again. but from FPU documentacion it says 2048 point FFT takes 65000 cycles and 85000 cycles to compute FFT magnitud and I only have 97us/6,6ns=14697 cycles machine to do this. According to this, could not CPU compute 2048 points FFT before 2048 samples come in again? Does F28335 sampling and proccesing simultaneously?


    Thanks

    Jonatan

  • Jonatan Vanegas said:
    Does F28335 sampling and proccesing simultaneously?

    I think you can setup the DMA to buffer the ADC samples while the C28x does the magnitude processing, as long as they are different buffers (and possible different physical RAM blocks - you will have to check the DMA guide for details on this)

  • Hi Vishal

    Thanks for you reply,

    Sorry for my delay. I have been working in DMA controller as you said and I think I have a program that works already. However, I don't  see how I can check Whether samples transfering  and proccesing are doing  simultaneously. 

    1. Is there any way or tool in CCS for check this? this is a part of my program. I am sampling 2 channels and I get 128 samples for aech one. 

    void main(void)
    {
    ………
    ……..
    InitAdc();
    AdcRegs.ADCTRL1.all = 0;
    AdcRegs.ADCTRL1.bit.SEQ_CASC =1;
    AdcRegs.ADCTRL1.bit.ACQ_PS =15;  
    AdcRegs.ADCTRL1.bit.CPS = 0;            // divide by 1
    AdcRegs.ADCTRL1.bit.CONT_RUN = 0; // single run mode
    AdcRegs.ADCTRL2.all = 0;
    AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;// Enable SOCA from ePWM to start SEQ1
    AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // Enable SEQ1 interrupt (every EOS)
    AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;
    AdcRegs.ADCTRL3.bit.SMODE_SEL = 0x1;
    AdcRegs.ADCMAXCONV.all = 0x0003;
    AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0;
    AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x1;
    AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x2;
    AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 0x3;
    AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 0x0;
    AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 0x1;
    AdcRegs.ADCCHSELSEQ2.bit.CONV06 = 0x2;
    AdcRegs.ADCCHSELSEQ2.bit.CONV07 = 0x3;
     
    EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group
    EPwm1Regs.ETSEL.bit.SOCASEL = 4; // Select SOC from from CPMA on upcount
    EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
    EPwm1Regs.CMPA.half.CMPA = 0x0080;      // Set compare A value
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // TBCLK = SYSCLKOUT
    EPwm1Regs.TBPRD = ADC_SAMPLE_PERIOD;//0xFFFF; // Set period for ePWM1
    EPwm1Regs.TBCTL.bit.CTRMODE = 0;  //
     
    DMAInitialize();
    //Configure DMA Channel
    DMADest   = &RFFTINPUT[0]; //Point DMA destination to the beginning of the array
    DMASource = &AdcMirror.ADCRESULT0;//Point DMA source to ADC result register base
    DMACH1AddrConfig(DMADest,DMASource);
    DMACH1BurstConfig(7,1,128);
    DMACH1TransferConfig(127,1,0);
    DMACH1WrapConfig(1,0,0,1);
    DMACH1ModeConfig(DMA_SEQ1INT,PERINT_ENABLE,ONESHOT_DISABLE,CONT_DISABLE,SYNC_DISABLE,SYNC_SRC,OVRFLOW_DISABLE,SIXTEEN_BIT,CHINT_END,CHINT_ENABLE);
    StartDMACH1();
    //--- Main Loop
       while(1){ // endless loop - wait for an interrupt
           if(FFTStartFlag){   // If one frame data ready, then do FFT
           contador++;
           //*******************Canal 1**************
           for(c=0;c<RFFT_SIZE;c++)
           AdcBuf[c]= RFFTINPUT[c];
     
           RFFT_adc_f32(&rfft_adc);
           RFFT_f32_mag(&rfft);       // Calculate spectrum amplitude
           RFFT_f32_phase(&rfft);
     
           for(c=0;c<RFFT_SIZE/2+1;c++){
           RFFTmag1[c]= RFFTmagBuff[c]*FACTOR_ESCALA;
           RFFTpha1[c]= RFFTphaBuff[c];
           }//********************************************
           //****************Canal 2*********************
           for(c=0;c<RFFT_SIZE;c++)
                  AdcBuf[c]= RFFTINPUT[c+128];
     
           RFFT_adc_f32(&rfft_adc);  
           RFFT_f32_mag(&rfft);       // Calculate spectrum amplitude
           RFFT_f32_phase(&rfft);
           for(c=0;c<RFFT_SIZE/2+1;c++){
           RFFTmag2[c]= RFFTmagBuff[c]*FACTOR_ESCALA;
           RFFTpha2[c]= RFFTphaBuff[c];
           }//********************************************
           ………
    ……….
           FFTStartFlag=0;
    }     
      }
    }
    interrupt void local_DINTCH1_ISR(void)     // DMA Channel 1
    {
    contador_1++;
    // To receive more interrupts from this PIE group, acknowledge this interrupt
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP7;
    FFTStartFlag=1;
    StartDMACH1();
    return;

    }
     
     

    2. In order to minimize computational load. I think I could modify RFFT_f32_mag and RFFT_f32_phase funtions due to I don't need all N/2 values that come from them and I only need the first 20 values. Unfortunately, I dont know asembly lenguage and I dont know how do it.

    Could you help me out?

    Thank for you Valuable help

    Jonatan