Hi,
I am using AMC1304M25 Delta Sigma Modulator to implement shunt current measurements. The filter module is used from on chip SDFM peripheral from TMS320F28377S Launchpad. For this, I edited an example already available in ControlSuite for interrupt based SDFM: sdfm_filters_sync_cpu.
I want to use only one channel of SDFM1 at the moment where the signal acquisition source is function generator.
The edited code is given below:
//###########################################################################
// FILE: sdfm_pwm_sync_cpu_cpu01.c
// TITLE: SDFM PWM sync Example for F2837xS.
//
//! \addtogroup cpu01_example_list
//! <h1> SDFM PWM Sync </h1>
//!
//###########################################################################
#include "F28x_Project.h"
#include "F2837xS_struct.h"
#include "F2837xS_sdfm_drivers.h"
//*****************************************************************************
// Macro definitions
//*****************************************************************************
#define MAX_SAMPLES 1024
#define SDFM_PIN_MUX_OPTION1 1 // only GPIO 16 and GPIO 17 are configured
#define SDFM_PIN_MUX_OPTION2 2
//*****************************************************************************
// Global variables
//*****************************************************************************
uint16_t gPeripheralNumber; // SDFM1
// Configure the period for each timer
#define EPWM11_TIMER_TBPRD 9 // Period register
#define EPWM11_CMPA 4
#define EPWM11_CMPB 4
#define latency 77
uint16_t Filter1_Result[MAX_SAMPLES];
//*****************************************************************************
#pragma DATA_SECTION(Filter1_Result,"Filter1_RegsFile");
void Sdfm_configurePins(uint16_t);
void InitEPwm11Example(void); // ePWM 11 Clock signal and filter sync
void done(void);
__interrupt void Sdfm1_ISR(void);
void main(void)
{
// initialize filter with value 1
unsigned int i=0;
for (i = 0; i < MAX_SAMPLES; i++)
{
Filter1_Result[i]=1;
}
uint16_t pinMuxoption;
uint16_t HLT, LLT; // to store threshold values
InitSysCtrl();
// for ePWM module
EALLOW;
ClkCfgRegs.PERCLKDIVSEL.bit.EPWMCLKDIV = 0x0; // set ePWM divider to /1
EDIS;
//
CpuSysRegs.PCLKCR2.bit.EPWM11 = 1;
//
InitGpio();
//************************Initialize PWM 11A/B GPIO************
GPIO_SetupPinMux(20, GPIO_MUX_CPU1, 5);
GPIO_SetupPinOptions(20, GPIO_OUTPUT, GPIO_PUSHPULL);
GPIO_SetupPinMux(21, GPIO_MUX_CPU1, 5);
GPIO_SetupPinOptions(21, GPIO_OUTPUT, GPIO_PUSHPULL);
//**************************************************************
// Disable CPU __interrupts
DINT;
// Initialize PIE control registers to their default state.
InitPieCtrl();
// Disable CPU __interrupts and clear all CPU __interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
InitPieVectTable();
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
EALLOW;
PieVectTable.SD1_INT = &Sdfm1_ISR;
// Enable CPU INT5 which is connected to SDFM INT
IER |= M_INT5;
EDIS;
// Enable SDFM INTn in the PIE: Group 5 __interrupt 9-10
PieCtrlRegs.PIEIER5.bit.INTx9 = 1; // SDFM1 interrupt enabled
//
// initialize ePWM11
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =0;
EDIS;
InitEPwm11Example();
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =1;
EDIS;
//
EINT;
//
pinMuxoption = SDFM_PIN_MUX_OPTION1;
// Configure GPIO pins as SDFM pins
Sdfm_configurePins(pinMuxoption);
//Select SDFM1
gPeripheralNumber = SDFM1;
/*******************************************************/
/* Input Control Module */
/*******************************************************/
//Configure Input Control Mode: Modulator Clock rate = Modulator data rate
Sdfm_configureInputCtrl(gPeripheralNumber, FILTER1, MODE_0);
/*******************************************************/
/* Comparator Module */
/*******************************************************/
HLT = 0x7FFF; //Over value threshold settings
LLT = 0x0000; //Under value threshold settings
//Configure Comparator module's comparator filter type and comparator's OSR value, higher threshold, lower threshold
Sdfm_configureComparator(gPeripheralNumber, FILTER1, SINC3, OSR_32, HLT, LLT);
/*******************************************************/
/* Data filter Module */
/*******************************************************/
//Configure Data filter modules filter type, OSR value and enable / disable data filter
Sdfm_configureData_filter(gPeripheralNumber, FILTER1, FILTER_ENABLE, SINC3, OSR_256, DATA_16_BIT, SHIFT_9_BITS);
// External reset are disabled
Sdfm_configureExternalreset(gPeripheralNumber,FILTER_1_EXT_RESET_DISABLE, FILTER_2_EXT_RESET_DISABLE, FILTER_3_EXT_RESET_DISABLE, FILTER_4_EXT_RESET_DISABLE);
/*******************************************************/
/* Enable interrupts */
/*******************************************************/
Sdfm_configureInterrupt(gPeripheralNumber, FILTER1, IEH_ENABLE, IEL_ENABLE, MFIE_ENABLE, AE_ENABLE);
Sdfm_enableMFE(gPeripheralNumber); // enable Module filters
DELAY_US(latency); // to avoid spurious interrupts
Sdfm_enableMIE(gPeripheralNumber);
while(1);
}
__interrupt void Sdfm1_ISR(void)
{
uint32_t sdfmReadFlagRegister =0;
static uint16_t loopCounter1 = 0;
// Read SDFM flag register (SDIFLG)
sdfmReadFlagRegister = Sdfm_readFlagRegister(gPeripheralNumber);
if(loopCounter1 <= MAX_SAMPLES)
{
// Read each SDFM filter output and store it in respective filter result array
Filter1_Result[loopCounter1++] = SDFM1_READ_FILTER1_DATA_16BIT;
// Clear SDFM flag register
Sdfm_clearFlagRegister(gPeripheralNumber,sdfmReadFlagRegister); // setting clrflag register to zero !
sdfmReadFlagRegister = Sdfm_readFlagRegister(gPeripheralNumber); // reading flag register to see if INT is cleared
if(sdfmReadFlagRegister != 0x0) // if INT is still active
{
ESTOP0;
}
}
else
{
ESTOP0;
done();
}
// Acknowledge this __interrupt to receive more __interrupts from group 5
PieCtrlRegs.PIEACK.all = PIEACK_GROUP5;
}
void Sdfm_configurePins(uint16_t sdfmPinOption)
{
uint16_t pin;
switch (sdfmPinOption)
{
case SDFM_PIN_MUX_OPTION1:
for(pin=16;pin<=17;pin++)
{
GPIO_SetupPinOptions(pin, GPIO_INPUT, GPIO_ASYNC); // Configure GPIOs as asynchronous input
GPIO_SetupPinMux(pin,GPIO_MUX_CPU1,7); // Configure this pin to be owned by CPU1 and configure this pin as SDFM pin
}
break;
case SDFM_PIN_MUX_OPTION2:
for(pin=18;pin<=19;pin++)
{
GPIO_SetupPinOptions(pin, GPIO_INPUT, GPIO_ASYNC);
GPIO_SetupPinMux(pin,GPIO_MUX_CPU1,7);
}
break;
}
}
void InitEPwm11Example(void)
{
// Setup TBCLK
EPwm11Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
EPwm11Regs.TBPRD = EPWM11_TIMER_TBPRD; // Set timer period
EPwm11Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm11Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm11Regs.TBCTR = 0x0000; // Clear counter
EPwm11Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm11Regs.TBCTL.bit.CLKDIV = TB_DIV2;
// Setup shadow register load on ZERO
EPwm11Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm11Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
// EPwm11Regs.CMPCTL2.bit.SHDWCMODE = CC_SHADOW;
EPwm11Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm11Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
// EPwm11Regs.CMPCTL2.bit.LOADCMODE = CC_CTR_ZERO;
// Set Compare values
EPwm11Regs.CMPA.bit.CMPA = EPWM11_CMPA; // Set compare A value
EPwm11Regs.CMPB.bit.CMPB = EPWM11_CMPB; // Set Compare B value
// Set actions
// EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET; // Set PWM1A on Zero
// EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR; // Clear PWM1A on event A, up count
EPwm11Regs.AQCTLA.bit.PRD = AQ_CLEAR;
EPwm11Regs.AQCTLA.bit.CAU = AQ_SET;
// EPwm1Regs.AQCTLB.bit.ZRO = AQ_SET; // Set PWM1B on Zero
// EPwm1Regs.AQCTLB.bit.CBU = AQ_CLEAR; // Clear PWM1B on event B, up count
EPwm11Regs.AQCTLB.bit.PRD = AQ_CLEAR;
EPwm11Regs.AQCTLB.bit.CAU = AQ_SET;
//Setting CMPC sync settings
// EPwm11Regs.CMPC = EPWM11_TIMER_TBPRD;
}
void done(void)
{
asm(" ESTOP0");
for (;;);
}
//
Same clock signals PWM11A and PWM11B (10MHz) are supplied to SD_Cx and AMC1304M25 modulator. Latter is also supplied with 5VDC.
The clock signal and data stream seen at delta sigma modulator pins CLK_IN and DOUT are
Data stream (yellow) seems to have half frequency to that of clock signal (blue).
The problem is that when I supply 400mVpeak-peak Signal from function generator centered around zero axis. The values that get stored in Filter Matrix are strange and their two's complement yields strange output voltages.
For example: Function generator Sine wave 400mVpeak-peak, Frequency 1KHz, Sine wave yields following matrix values
Similarly, Function generator sine wave with 100mVpeak-peak having same frequency doesnt seem considerably different
In addition, for HLT 0x7FFF, higher threshold Interrupt is only triggered when I supply a sine wave of around 1100mVpeak-peak. I am not sure if +250mV and -250mV range of my modulator is RMS or Vpeak-peak value.
I have following queries:
1) How can I evaluate if data being converted is correct; I am taking two's complement of data acquired from filter but that doesn't seem to be correct. I read somehwere in application note that input voltage can be obtained by Vin_calc = (Vclipping)*Codeword / Abs(Codewordpeak), but that doesn't fit either.
2) I have tried using synchronization PWM11.CPMC but in that case my filtter matrix only gets ZEROS and program never comes to halt. Do I need to match AMC1304M25 fall edge and SDFM rise edge processings by using any other PWMx and PWM11.CMPC? As I am using only one channel, do I still need to do synchronization using PWM11.CMPC? I want to use interrupts ISR based accesses of Data Filter reads.
3) Even while using Interrupts ISR, do we need to dealy latency period after Acknowledge Interrupt AEx has occured.
Could you help me please. I will be obliged.
Greetings,
Inam
