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CLA is not working after power-cycle even using LOAD = FLASH, RUN = L3DPSARAM

Other Parts Discussed in Thread: TMS320F28069

I’m trying to use CLA task3 on a TMS320F28069 device. It works properly while debugging using JTAG but not when I power-cycle the target and let it run without JTAG. CPU runs and doesn’t hang but CLA just does nothing

 

Following Multiday-workshop Lab_12 example, *.cla file program code is copied from flash to RAM using memcpy at CLA initialization

extern Uint32 Cla1funcsRunStart, Cla1funcsLoadStart, Cla1funcsLoadSize;

memcpy(&Cla1funcsRunStart, &Cla1funcsLoadStart, (Uint32)&Cla1funcsLoadSize);

 

Then CLA program code is mapped from CPU to CLA

Cla1Regs.MMEMCFG.all = CLA_PROG_ENABLE|CLARAM0_ENABLE|CLARAM1_ENABLE|CLARAM2_ENABLE|CLA_RAM1CPUE;

 

The cmd linker:

CLA_SCRATCHPAD_SIZE = 0x100;

--undef_sym=__cla_scratchpad_end

--undef_sym=__cla_scratchpad_start

 

MEMORY:

{

PAGE 0:

       L3DPSARAM         : origin = 0x009000, length = 0x001000 /* CLA program RAM */

PAGE 1 :   /* Data Memory */

  

   CLA1_MSGRAMLOW     : origin = 0x001480, length = 0x000080

   CLA1_MSGRAMHIGH   : origin = 0x001500, length = 0x000080

 

/* Load to flash, run from CLA Prog RAM */

   Cla1Prog         : LOAD = FLASH_ABCDEFGH, PAGE = 0

                               RUN_START(_Cla1Prog_Start)                    

RUN = L3DPSARAM, PAGE = 0

LOAD_START(_Cla1funcsLoadStart),

LOAD_SIZE(_Cla1funcsLoadSize)

                               RUN_START(_Cla1funcsRunStart)

CLAscratch       :

                     { *.obj(CLAscratch) // Scratchpad memory for the CLA C Compiler

                       . += CLA_SCRATCHPAD_SIZE;

                       *.obj(CLAscratch_end)

                     } > L2DPSARAM, PAGE = 1

 

For compiler 6.4.2 it is just used the following:

.scratchpad     : > L2DPSARAM,       PAGE = 1

 

I guess that the debugger is loading the CLA code to RAM as spruh18e.pdf  says, and that is the reason it works fine while debugging:

“During debug the block can also be loaded directly by Code Composer Studio”

 

When I am debugging, I can see that the variable to control changes while task3 is running. CPU has access to this value to send it to a host (user GUI). I use task8 to reset PI controller variables and it works fine too

 

Task3 is triggered by PWM3 and task8 is forced by SW when the user stops the control. For testing purposes I’ve changed the SW to force task3 by SW. It works while debugging but after a power-cycle, the CPU hangs and restarts (watchdog) just when the task3 is launched (by the user switch)

 

The CLA code addresses are fine while debugging and at the map file:

Cla1funcsRunStart = 0x9000

Cla1funcsLoadStart = 0x3D898A

Cla1funcsLoadSize = 0x228

 

abs   00000228 _Cla1funcsLoadSize        

0     003d898a _Cla1funcsLoadStart      

0     00009000 _Cla1funcsRunStart

Tasks addresses:

0     00009200 _Cla1Task1                

0     00009208 _Cla1Task2                

0     00009000 _Cla1Task3                

0     00009210 _Cla1Task4                

0     00009218 _Cla1Task5                

0     00009220 _Cla1Task6                

0     000091ce _Cla1Task7                

0     000090d2 _Cla1Task8

 ---------------------------------------------

Test to see what is in the flash memo:

I create a function

void FlashTaskFnc(void){ asm(" RPT #3 || NOP"); }

I which is exactly the same as ClaTask7

interrupt void Cla1Task7 ( void ){ asm(" RPT #3 || NOP");}

 

Look for their addresses on map output file

003d9d53 _FlashTaskFnc

003d8b58   0000000e     ControlTasks.obj (Cla1Prog:_Cla1Task7)

 

I compare their contents at debugger Memo browser:

0x3D9D53 FlashTaskFnc

0x3D9D53 F603 7700 FF69 0006

 

(0x3D8B58: Cla1Task7 address at flash)

0x3D8B58 0000 7FA0 F603 7700 --- > DIFFERENT !!!

 

I don’t know why the linker is not saving properly the cla tasks to flash

 

Something else I don’t understand: building Lab_12 I can see at Lab_12.map file the symbols:

00008c00     230 (00008c00)     __cla_scratchpad_start

 

00008d00     234 (00008d00)     __cla_scratchpad_end

 

but I cannot see them in myapp.map file although they are defined at cmd linker and the same compiler version is used

Another issue: When I connect the debugger to the CLA, CCS says "no source code for 0x09000", even if I compile using -g option

Device: TMS320F28069 MPZT, probleam seen on several devices

CCS v6.0.1.00040

C2000 v6.4.2

custom board

JTAG: XDS100v2

Thanks!

Agus

  • The problem was that the CLA clock was enabled right after doing
    Cla1Regs.MMEMCFG.all = CLA_PROG_ENABLE|CLARAM0_ENABLE|CLARAM1_ENABLE|CLARAM2_ENABLE|CLA_RAM1CPUE;
    Cla1Regs.MCTL.bit.IACKE = 1;

    so, the mem cfg was not carried out

    Now,
    EALLOW;
    SysCtrlRegs.PCLKCR3.bit.CLA1ENCLK = 1; // SYSCLKOUT to CLA1 enabled
    EDIS;
    is done before memcfg

    Thanks to the forum suggestions!
  • Hi Agus,

    Thank you for updating us with your progress. If you have any other questions, please don't hesitate to start a new post.

    Elizabeth