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How to imprrove adc reading stability?

Hello Everyone,

I'm using 2 hall sensor to read the output current and voltage from a switched power supply.

I'm using the A2 and B2 Adc channels from a LauchpadXL (f28377s) DSP.

The problem it that the values are not stable even when the voltage and current are. I've added a RC low pass filter to avoid noise from the power supply and a sliding window digital filter but the adc still have spikes on the readings.

Bellow is the graph for some samples. As you can see, for a strable value, the readings vary plenty.

Does anyone know how can i improve the stabilities of the readings?

Thank you for your time.

Regards,

Bruno Duarte

  • Hi Bruno

    Bruno Duarte28 said:
    The problem it that the values are not stable even when the voltage and current are. I've added a RC low pass filter to avoid noise from the power supply and a sliding window digital filter but the adc still have spikes on the readings.

    You should not experience the above until ADC input itself is fluctuating! So you need to check the same and need to be very sure that input is very stable. Another way to stabilize the ADC is to increase the Acquisition period to full ie the ACQPS register. Also, try f=implementing a moving average filter.

    Regards,

    Gautam

  • Hello Gautam,

    I've already applied a moving average filter, with 300 position and increased the ACQPS to 199.

    With this, the average values is more stable but if i check the input values from the adc, for a medium 250 value some readings get higher than 300 or lower than 200.

  • What are values of R & C? I would recommend a 0.1uF and 47E. Do check with the same. Also, have you captured the same signal on DSO? Can you share the waveform if so?
  • A low Pass with 0,1uF and 47R gives a 15kHz curring frequency ...

    I'm trying a much lower cutting frequency in the 150Hz Range or bellow.

    With the osciloscope i get a periodic spike. I think thats what messing with my readings.

    Those spikes have 20ms period ... so I guess that is what is messing my ADC.

    I'll have to try to solve that. Thank you for the help =)

    Best Regards,

    Bruno Duarte

  • Hi Bruno,

    There is a discussion of building very aggressive LP filters on the ADC inputs (for a different C2000 device) in this linked post. This may help you avoid some caveats if you decide to build a very aggressive LP analog filter on the ADC inputs:

    e2e.ti.com/.../1999388
  • Thank you,

    Ill read that post to see if it Helps .

    And i think those spikes can be noise on the osciloscope measures ...

    Regards,
    Bruno Duarte
  • Hello Devin,

    I've been doing further tests and the resuts are not good.

      

    This are the waveforms ( from the TI compiler ) of the AdcAResult1 variable for 3 different voltages ( 2,98V ; 1.5V and 0.75V)

    As you can see, the value swings too much on stable voltage readings ( i was using a Pot to change the value and measuring the voltage with a digital multimeter )

    i dont know if it is a incorrect confguration or what can be the cause of this instability.

    Attached is the ADC configuration function. 

    Thanks.

    ADC Config function.txt
    void AdcConfig(void)
    {
    
    	EALLOW;
    	AdcaRegs.ADCCTL2.bit.PRESCALE 		= 6; 		//set ADCCLK divider to /4
    	AdcbRegs.ADCCTL2.bit.PRESCALE 		= 6; 		//set ADCCLK divider to /4
    
    	// Sequencia de PowerUp
    	//power up the ADCs
    	AdcaRegs.ADCCTL1.bit.ADCPWDNZ  		= 1;      	// Power up ADC
    	AdcbRegs.ADCCTL1.bit.ADCPWDNZ  		= 1;      	// Power up ADC
    	//Set pulse positions to late
    	AdcaRegs.ADCCTL1.bit.INTPULSEPOS 	= 1; 		// INT pulse generation occurs 1 cycle prior to ADC result latching into its result register
    	AdcbRegs.ADCCTL1.bit.INTPULSEPOS 	= 1; 		// INT pulse generation occurs 1 cycle prior to ADC result latching into its result register
    
    	DELAY_US(500);
    
    	//ADC_A
    	AdcaRegs.ADCSOC2CTL.bit.CHSEL 		= 15; 		// SOC2 will convert pin A15
    	AdcaRegs.ADCSOC2CTL.bit.ACQPS 		= 19; 		// ADCSOC1CTL = 0x0A86, CHSEL 		-> sample window 7 cycles
    	AdcaRegs.ADCSOC2CTL.bit.TRIGSEL		= 1;
    
    	//ADC_B
    	AdcbRegs.ADCSOC2CTL.bit.CHSEL 		= 15; 		// SOC2 will convert pin b2  		-> ADCINB2 || J3.26
    	AdcbRegs.ADCSOC2CTL.bit.ACQPS 		= 19; 		// ADCSOC1CTL = 0x0A86, CHSEL 		-> sample window 7 cycles
    	AdcbRegs.ADCSOC2CTL.bit.TRIGSEL		= 1;
    
    	AdcaRegs.ADCINTSEL1N2.bit.INT1E 	= 1;   			//enable INT1 flag
    
    	EDIS;
    }

  • Hi Bruno,

    What is the impedance of your pot? Do you still have a large capacitor on the pin?

    If you don't have a large cap, the impedance of the pot may be too high to effectively drive the ADC. You can help this a little bit by increasing the S+H window duration, but this will only get you so far (setting the S+H window to a large value is a good experiment to try in any case to see if it helps).

    If you do have a large capacitance, and also a high-impedance pot, you may want to try a slower sampling rate. The charge can slowly bleed off of the external cap if the external source isn't strong enough to replenish it between samples. This would admittedly probably result in readings changing slowly over time; not with erratic results.

    What is the input to the pot (input of the voltage divider). A noisy input source will result in a noisy output. You could add a large capacitance here too.

    Have you tried scoping the VREFHI pin to ensure the reference is stable and noise free. Noise coupling into the reference pin will show up directly in the output.

    Is the ADC being allowed the required power-up time after you write the configurations and enable the ADC? This could cause erratic conversions until the ADC power stabilizes.
  • I was using a 10k Pot with no aditional components in the circuit.
    The input of the voltage divider was the 3.3V from the development board.
    I have the delay after the power up sequence, just as in the examples.

    The signal i need to measure comes from a hall voltage sensor. it goes to the adc after going trough a voltage follower amp op configuration.

    I'll post the results when i test it again.

    thanks
  • Bruno,

    Ok. The 3.3V board supply, without any filtering, and through a high impedance source could definitely lead to very noisy results. Please post back here if you have any issues with your hall sensor, but I would expect the results to be much better if it is buffered. I'd suggest at least putting footprints for an R-C low-pass filter after your voltage-follower amplifier. You can start with these de-populated, or you can start with something conservative like 30 ohms and 10pF.
  • Hi Devin,

    I still haven't found a solution to the instability problem and now a have another problem.

    When i added another ADC port, it interferes with other ones. For example, i have A2/B2 and A3/B3. When i place a voltage at A2, with a resistor voltage divider, it starts reading a value on the A3 register.

    Tomorrow ill try to check the voltage at VrefHi and place two voltages different voltages at the pins to see what happens.

    Can this all this ADC problem be a faulty board?


    Thank you
  • Hi Bruno,

    If you are seeing the conversion results from the previous conversion affecting the current conversion results, then the input impedance of the current conversion is too high and/or the S+H window is too small. You can simulate this in SPICE (see the linked post further up the thread) or you can estimate the settling analytically.

    Some things you can try to confirm this:
    -Change the order of the sampled channels and observe where the error goes
    -Increase the S+H duration (controlled by the ACQPS setting)
    -Decrease the input impedance by reducing the C and (especially) R on the input.

    Since you are using 2 different ADCs, one other thing to keep in mind is that you need to ensure that the ADCs run synchronously. There is a section in the ADC chapter of the TRM that goes into this in depth. An easy experiment would be to only do conversions on one ADC and see if that makes a difference in the noisiness of the results.