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TMS320F28377D SCI-A on CPU1 and SCI-B on CPU-2 not working together.

Hello,

My problem is the following:

- I set up SCI-A on CPU1 for my serial communication reception

- I set up SCI-B on CPU2 for my serial communication transmission

- I set up a IPC transfert in between CPU1 and CPU2

Both SCI-A, and SCI-B are working perfectly when used separately.

IPC transfert is working perfectly.

When i want and use SCI-A and SCI-B "together", ie i (try to) :

- receive data on CPU-1 SCI-A,

- transfert data to CPU-2 via IPC,

- send data on CPU2 SCI-B,

As far as (CPU-2) SCI-B is active i cant receive data on (CPU-1) SCI-A.

Is it normal?

Is there a kind of "semaphore sharing" mechanism to set up?

Priority access to shared devices?

Can i find examples somewhere?

Thank you! 

 

  • Hi,

    Both should be able to work independently. Once you assign a shared resource to CPU2 (e.g. in this case SCIB to CPU2), CPU1 does not have access to that resource hence there is no question of priority access.

    Please check if SCIA (CPU1) is going into some error condition because CPU1 busy with transferring data to CPU2 via IPC.

    Regards,

    Vivek Singh

  • tTank you.

    You are pe'fectly right, i was expecting to be high loaded on the serial transmission but In fact CPU2 is too busy with the serial link and is blocking (i assume )the IPC transfert. Hence the error on CPU1. I m trying to accelerate SCI-B by using the FIFO, could i accelerate IPC transfert also, using DMA maybe?
  • Hi,

    I m trying to accelerate SCI-B by using the FIFO, could i accelerate IPC transfert also, using DMA maybe?

    DMA does not have access to SCI and also to IPC register. There is MSG RAM which you could use for this transfer. Basically CPU1 can write data into MSG RAM and then indicate to CPU2 via IPC that data is available and then whenever CPU2 is free it can READ the data from MSG RAM. 

    Regards,

    Vivek Singh