In section 4.1.1 of the concerto MCU user manual we can read that in relation to the first 9 ports (A-J) ...
Programmable control for GPIO interrupts
– Interrupt generation masking
– Edge-triggered on rising, falling, or both
– Level-sensitive on High or Low values
A paragraph below this we can read:
In addition to the above nine GPIO blocks, an additional eight GPIO blocks, each corresponding to an
individual GPIO port (Port K, Port L, Port M, Port N, Port P, Port Q, Port R, Port S) are available on this
device. These ports are accessible only by AHB bus and not accessible through the APB bus.
These new ports add an additional 64 GPIOs, bringing the total of available GPIOs on this device to 136,
depending on the configuration. The rest of the features on these 64 GPIOs are the same as above listed
for PortA to PortJ GPIOs.
...but the features on these 9 ports do not appear to include interrupt ability as interrupt registers only service up to interrupt number 91. So the features are not "the same"
-bradiko
