In my study, I use epwm2A-2B, epwm6A-6B and epwm7A-7B moduls(six pwm port used). And, I use only epwm2 interrupt rutine to update the all pwm compare registers (ewpm 2a-2b-6a-6b-7a-7b) and also all pwm ports have same frequency(10khz), all pwm ports counters are synchronized. I try to creat spwm so every interrupt my code calculate new sin value and update the compare value of the pwms.
Q) In evrey zero points of the sin value, I expect pwm 2A- 6A-7A ports change the position same time but not change same time a time delay occure between them.how can I fix these problem.
//
// Included Files
//
#include "F28x_Project.h"
#include "math.h"
#define EPWM2_TIMER_TBPRD 2500 // 10kHz PWM Period register
#define PI 3.14159265358979323846
void InitEPwm2Example(void);
void InitEPwm6Example(void);
void InitEPwm7Example(void);
__interrupt void epwm2_isr(void);
unsigned int i=0,m=0;
float a=0,k=0;
// Main
void main(void)
{
InitSysCtrl();
//InitGpio();
EALLOW;
// InitEPwm6Gpio();
GpioCtrlRegs.GPAPUD.bit.GPIO10 = 1; // Disable pull-up on GPIO10 (EPWM6A)
GpioCtrlRegs.GPAPUD.bit.GPIO11 = 1;
GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 1; // Configure GPIO10 as EPWM6A
GpioCtrlRegs.GPAMUX1.bit.GPIO11 = 1;
//InitEPwm2Gpio();
GpioCtrlRegs.GPAPUD.bit.GPIO2 = 1; // Disable pull-up on GPIO2 (EPWM2A)
GpioCtrlRegs.GPAPUD.bit.GPIO3 = 1;
GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; // Configure GPIO2 as EPWM2A
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1;
// InitEPwm7Gpio();
GpioCtrlRegs.GPAPUD.bit.GPIO12 = 1; // Disable pull-up on GPIO12 (EPWM7A)
GpioCtrlRegs.GPAPUD.bit.GPIO13 = 1;
GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 1; // Configure GPIO12 as EPWM7A
GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 1;
EDIS;
DINT;
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
EALLOW;
PieVectTable.EPWM2_INT = &epwm2_isr;
EDIS;
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;
InitEPwm2Example();
InitEPwm6Example();
InitEPwm7Example();
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;
IER |= M_INT3;
PieCtrlRegs.PIEIER3.bit.INTx2 = 1;
CpuSysRegs.PCLKCR2.bit.EPWM2=1;
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
for(;;)
{
asm (" NOP");
}
}
__interrupt void epwm2_isr(void)
{
if(i<200)i++;
else i=0;
a=sin(2*PI*50*i/10000);
k=2400*a;
if (k>0){
EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR;
EPwm2Regs.AQCTLA.bit.CAD = AQ_SET;
EPwm2Regs.AQCTLB.bit.CBU = AQ_CLEAR;
EPwm2Regs.AQCTLB.bit.CBD = AQ_SET;
EPwm2Regs.CMPA.bit.CMPA = k;
EPwm2Regs.CMPB.bit.CMPB = k;
EPwm6Regs.AQCTLA.bit.CAU = AQ_SET;
EPwm6Regs.AQCTLA.bit.CAD = AQ_SET;
EPwm6Regs.AQCTLB.bit.CBU = AQ_SET;
EPwm6Regs.AQCTLB.bit.CBD = AQ_SET;
EPwm6Regs.CMPA.bit.CMPA = 2499;
EPwm6Regs.CMPB.bit.CMPB = 2499;
EPwm7Regs.AQCTLA.bit.CAU = AQ_SET;
EPwm7Regs.AQCTLA.bit.CAD = AQ_CLEAR;
EPwm7Regs.AQCTLB.bit.CBU = AQ_SET;
EPwm7Regs.AQCTLB.bit.CBD = AQ_CLEAR;
EPwm7Regs.CMPA.bit.CMPA = k;
EPwm7Regs.CMPB.bit.CMPB = k;
}
else {
EPwm2Regs.AQCTLA.bit.CAU = AQ_SET;
EPwm2Regs.AQCTLA.bit.CAD = AQ_CLEAR;
EPwm2Regs.AQCTLB.bit.CBU = AQ_SET;
EPwm2Regs.AQCTLB.bit.CBD = AQ_CLEAR;
EPwm2Regs.CMPB.bit.CMPB = -k;
EPwm2Regs.CMPA.bit.CMPA = -k;
EPwm6Regs.AQCTLA.bit.CAU = AQ_CLEAR;
EPwm6Regs.AQCTLA.bit.CAD = AQ_SET;
EPwm6Regs.AQCTLB.bit.CBU = AQ_CLEAR;
EPwm6Regs.AQCTLB.bit.CBD = AQ_SET;
EPwm6Regs.CMPB.bit.CMPB = -k;
EPwm6Regs.CMPA.bit.CMPA = -k;
EPwm7Regs.AQCTLA.bit.CAU = AQ_SET;
EPwm7Regs.AQCTLA.bit.CAD = AQ_SET;
EPwm7Regs.AQCTLB.bit.CBU = AQ_SET;
EPwm7Regs.AQCTLB.bit.CBD = AQ_SET;
EPwm7Regs.CMPB.bit.CMPB = 2600;
EPwm7Regs.CMPA.bit.CMPA = 2600;
}
EPwm2Regs.ETCLR.bit.INT = 1;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}
void InitEPwm2Example()
{
EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // hem zero hemde TBPRD zamanında intrrupt alıyo.
EPwm2Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm2Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 1st event
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up and down
EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV2;
EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_IMMEDIATE;
EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_IMMEDIATE;
EPwm2Regs.TBPRD = EPWM2_TIMER_TBPRD; // Set timer period 801 TBCLKs
EPwm2Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm2Regs.TBCTR = 0x0000;// Clear counter
}
void InitEPwm6Example()
{
//EPwm6Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // hem zero hemde TBPRD zamanında intrrupt alıyo.
//EPwm6Regs.ETSEL.bit.INTEN = 1; // Enable INT
//EPwm6Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 1st event
EPwm6Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up and down
EPwm6Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm6Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm6Regs.TBCTL.bit.CLKDIV = TB_DIV2;
EPwm6Regs.CMPCTL.bit.SHDWAMODE = CC_IMMEDIATE;
EPwm6Regs.CMPCTL.bit.SHDWBMODE = CC_IMMEDIATE;
EPwm6Regs.TBPRD = EPWM2_TIMER_TBPRD; // Set timer period 801 TBCLKs
EPwm6Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm6Regs.TBCTR = 0x0000;// Clear counter
}
void InitEPwm7Example()
{
//EPwm6Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // hem zero hemde TBPRD zamanında intrrupt alıyo.
//EPwm6Regs.ETSEL.bit.INTEN = 1; // Enable INT
//EPwm6Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 1st event
EPwm7Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up and down
EPwm7Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm7Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm7Regs.TBCTL.bit.CLKDIV = TB_DIV2;
EPwm7Regs.CMPCTL.bit.SHDWAMODE = CC_IMMEDIATE;
EPwm7Regs.CMPCTL.bit.SHDWBMODE = CC_IMMEDIATE;
EPwm7Regs.TBPRD = EPWM2_TIMER_TBPRD; // Set timer period 801 TBCLKs
EPwm7Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm7Regs.TBCTR = 0x0000;// Clear counter
}
