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F28032 IIC XMST bit issue

Hi Team,

   My customer encountered an issue during using IIC, F28032 worked as slave: the master send command to F28032, F28032 replied with 3 bytes data, after receiving the second byte, the master end the communication, but the F28032 has put the third data into I2CDXR which moved to I2CXSR, so when the master send another command, F28032 will send out the I2CXSR which is belong to previous command, this would cause the master received wrong information.

  For this issue, my customer want to using XMST bit for detecting the third byte in previous command: if F28032 received a command from master again, and if the XMST is 0, update the data to I2CDXR, otherwise just send I2CXSR data, and update a notice for the second bytes.  but during debug, the XMST is not cleared even after send the third bytes.

  Could you kindly help give comments that the XMST is not cleared after sending all the data?

  Expect for your reply, thanks.

Best Regards

Benjamin

  • Benjamin,

    Does the master properly send a NACK after the second data byte? Please tell me the exact sequence. There's a known issue that might be cause the third byte to be kept after a STOP condition, but I wouldn't expect XSMT to stay high even after more bytes are sent.
  • Procedure for the I2C communication between Master & F28032;

    1. Master send command to Slave:

       

    2. Master send Read Data command to Slave;

       

    3. Master received the data and terminated with NACK + Stop;

    In Step 1) & 2), the XSMT bit worked as user guide descripted. But after NACK, the XSMT bit set to 1, and even after stop situation, the XSMT is 1; XSMT status shown as table 1;

    Then master send another round, after repeated start operationthe XSMT is cleared to 0;

    Master

    Start

    Addr + W

     

    CMD

     

    Repeated Start Condition

    Add + R

     

     

     

    ACK

     

     

    ACK

     

     

    NACK

    Stop

    F28032

     

     

    ACK

     

    ACK

     

     

    ACK

    Data 1

     

     

    Data2

     

     

    Data3

     

     

     

    F28032

    Xmst BIT value

    XSMT = 0

    XSMT = 0

    XSMT = 0

    XSMT = 0

    XSMT = 0

    XSMT = 0

    XSMT = 0

    XSMT = 0

    XSMT = 1

    (Fill the data to I2CDXR

    XSMT = 0

    XSMT = 0

    XSMT= 1

    XSMT = 0

    XSMT = 0

    XSMT= 1

    XSMT = 0

    XSMT = 1

    XSMT = 1

    Table 1: First Round communication

    Master

    Start

    Addr + W

     

    CMD

     

    Repeated Start Condition

    Add + R

     

     

     

    ACK

     

     

    ACK

     

     

    NACK

    Stop

    F28032

     

     

    ACK

     

    ACK

     

     

    ACK

    Data 1

     

     

    Data2

     

     

    Data3

     

     

     

    F28032

    Xmst BIT value

    XSMT = 1

    XSMT = 1

    XSMT = 1

    XSMT = 1

    XSMT = 1

    XSMT = 0

    XSMT = 0

    XSMT = 0

    XSMT = 1

    (Fill the data to I2CDXR

    XSMT = 0

    XSMT = 0

    XSMT= 1

    XSMT = 0

    XSMT = 0

    XSMT= 1

    XSMT = 0

    XSMT = 1

    XSMT = 1

    Table 2: Second Round communication;

    Questions:

    1. If NACK received, is the XSMT always set to 1?

    2. If XSMT is 1, when Master send the second round of Read Data; after the Sr(Repeated start condition), the XSMT clear to 0;  is this a fixed operation to clear XSMT bit after Sr?

    Expect for your reply, thanks.

    Best Regards

    Benjamin

  • Hi Adam,
    Any comments on the XSMT status when NACK happened?
  • Benjamin,

    XSMT is active low. After a NACK, there's no need for more data, so XSMT should stay high.

    In the second round, are you sure XSMT goes low after the repeated start, and not after the address+read bit?