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Hi
I use CC6.1.2 with v6.4.10 compiler to compile TMS320F2837xS cla_exp10_cpu01 code example project in controlSUITE.
--cla_support is cla1.
I add below function to ClaTask1 for running, but the assembly is too much as below after the C function,
so pls help to clarify why generates so much assembly statement and lead to more program memory needed for CLA running,
or any guide to let the compiler output smaller code size memory
Thanks
in initialization part, we let CLA could control the GPIO10,11,12
GpioCtrlRegs.GPACSEL2.bit.GPIO10 = 1; //CPU1.CLA
GpioCtrlRegs.GPACSEL2.bit.GPIO11 = 1; //CPU1.CLA
GpioCtrlRegs.GPACSEL2.bit.GPIO12 = 1; //CPU1.CLA
#pragma CODE_SECTION(Adc_ChannelSelect,"Cla1Prog");
Uint32 AdcChannelSelecttemp;
void Adc_ChannelSelect(void)
{
uiAdcChannelSelectpre=uiAdcChannelSelect;
if(uiAdcChannelSelect>=7)
{
uiAdcChannelSelect=0;
}
else
{
uiAdcChannelSelect++;
}
switch(uiAdcChannelSelect)
{
case 0:
GpioDataRegs.GPACLEAR.bit.GPIO10 = 1;
GpioDataRegs.GPACLEAR.bit.GPIO11 = 1;
GpioDataRegs.GPACLEAR.bit.GPIO12 = 1;
break;
case 1:
GpioDataRegs.GPASET.bit.GPIO10 = 1;
GpioDataRegs.GPACLEAR.bit.GPIO11 = 1;
GpioDataRegs.GPACLEAR.bit.GPIO12 = 1;
break;
case 2:
GpioDataRegs.GPACLEAR.bit.GPIO10 = 1;
GpioDataRegs.GPASET.bit.GPIO11 = 1;
GpioDataRegs.GPACLEAR.bit.GPIO12 = 1;
break;
case 3:
GpioDataRegs.GPASET.bit.GPIO10 = 1;
GpioDataRegs.GPASET.bit.GPIO11 = 1;
GpioDataRegs.GPACLEAR.bit.GPIO12 = 1;
break;
case 4:
GpioDataRegs.GPACLEAR.bit.GPIO10 = 1;
GpioDataRegs.GPACLEAR.bit.GPIO11 = 1;
GpioDataRegs.GPASET.bit.GPIO12 = 1;
break;
case 5:
GpioDataRegs.GPASET.bit.GPIO10 = 1;
GpioDataRegs.GPACLEAR.bit.GPIO11 = 1;
GpioDataRegs.GPASET.bit.GPIO12 = 1;
break;
case 6:
GpioDataRegs.GPACLEAR.bit.GPIO10 = 1;
GpioDataRegs.GPASET.bit.GPIO11 = 1;
GpioDataRegs.GPASET.bit.GPIO12 = 1;
break;
case 7:
GpioDataRegs.GPASET.bit.GPIO10 = 1;
GpioDataRegs.GPASET.bit.GPIO11 = 1;
GpioDataRegs.GPASET.bit.GPIO12 = 1;
break;
default:
break;
}
/*
AdcChannelSelecttemp=(Uint32)uiAdcChannelSelect<<10; //先将通道选口移至相应的位
GpioDataRegs.GPASET.all= AdcChannelSelecttemp; //对需要置1的位进行SET,SET 0不影响输出
AdcChannelSelecttemp=(~AdcChannelSelecttemp) & 0x00001C00; //先取反,再将其它位清零。得到选通需要清零的位
GpioDataRegs.GPACLEAR.all= AdcChannelSelecttemp; //对选通需要清零的位进行CLEAR, CLEAR 0不影响输出
*/
}
Adc_ChannelSelect(), c:
00a504: 83DE MOVL XAR5, *+XAR6[3]
00a505: 7580 SUB *XAR0++, AH
00a506: 83E0 MOVL XAR5, *+XAR0[4]
00a507: 75C0 SUB *+XAR0[0], AH
180
00a508: 0000 ITRAP0
00a509: 7841 MOV *-SP[1], AR0
00a50a: 0007 POP RPC
00a50b: 7881 MOV *XAR1++, AR0
00a50c: 003C TRAP #28
00a50d: 7BC0 MOV *+XAR0[0], AR3
00a50e: 003C TRAP #28
00a50f: 7B80 MOV *XAR0++, AR3
00a510: 0001 ABORTI
00a511: 7F20 MOV @0x20, AR7
00a512: 0000 ITRAP0
00a513: 7FA0 MOV @AR0, AR7
00a514: 0000 ITRAP0
00a515: 7FA0 MOV @AR0, AR7
00a516: 0000 ITRAP0
00a517: 7FA0 MOV @AR0, AR7
00a518: 0014 INTR INT5
00a519: 7982 MOV *XAR2++, AR1
00a51a: 0000 ITRAP0
00a51b: 7FA0 MOV @AR0, AR7
00a51c: 0000 ITRAP0
00a51d: 7FA0 MOV @AR0, AR7
00a51e: 0000 ITRAP0
00a51f: 7FA0 MOV @AR0, AR7
182 {
00a520: 0000 ITRAP0
00a521: 7840 MOV *-SP[0], AR0
00a522: 83DE MOVL XAR5, *+XAR6[3]
00a523: 75C0 SUB *+XAR0[0], AH
183 uiAdcChannelSelect=0;
00a524: 014A SUBU ACC, *-SP[10]
00a525: 798E MOV *--XAR6, AR1
00a526: 0000 ITRAP0
00a527: 7FA0 MOV @AR0, AR7
00a528: 0000 ITRAP0
00a529: 7FA0 MOV @AR0, AR7
00a52a: 0000 ITRAP0
00a52b: 7FA0 MOV @AR0, AR7
186 {
C$L4:
00a52c: 0000 ITRAP0
00a52d: 7841 MOV *-SP[1], AR0
00a52e: 83DE MOVL XAR5, *+XAR6[3]
00a52f: 7580 SUB *XAR0++, AH
00a530: 0001 ABORTI
00a531: 7881 MOV *XAR1++, AR0
00a532: 0004 PUSH RPC
00a533: 7CC0 MOV *+XAR0[0], AR4
00a534: 83DE MOVL XAR5, *+XAR6[3]
00a535: 75C0 SUB *+XAR0[0], AH
190
00a536: 0138 SUBU ACC, @0x38
00a537: 798E MOV *--XAR6, AR1
00a538: 0000 ITRAP0
00a539: 7FA0 MOV @AR0, AR7
00a53a: 0000 ITRAP0
00a53b: 7FA0 MOV @AR0, AR7
00a53c: 0000 ITRAP0
00a53d: 7FA0 MOV @AR0, AR7
193 case 0:
C$L5:
00a53e: 0000 ITRAP0
00a53f: 7841 MOV *-SP[1], AR0
00a540: 7F04 MOV @0x4, AR7
00a541: 7580 SUB *XAR0++, AH
00a542: 0400 SUB ACC, @0x0 << 16
00a543: 7881 MOV *XAR1++, AR0
00a544: 0004 PUSH RPC
00a545: 7C80 MOV *XAR0++, AR4
00a546: 7F04 MOV @0x4, AR7
00a547: 75C0 SUB *+XAR0[0], AH
194 GpioDataRegs.GPACLEAR.bit.GPIO10 = 1;
00a548: 0000 ITRAP0
00a549: 7841 MOV *-SP[1], AR0
00a54a: 08007881 ADD @0x0, #30849
00a54c: 7F04 MOV @0x4, AR7
00a54d: 7580 SUB *XAR0++, AH
00a54e: 0004 PUSH RPC
00a54f: 7C80 MOV *XAR0++, AR4
00a550: 7F04 MOV @0x4, AR7
00a551: 75C0 SUB *+XAR0[0], AH
195 GpioDataRegs.GPACLEAR.bit.GPIO11 = 1;
00a552: 0000 ITRAP0
00a553: 7841 MOV *-SP[1], AR0
00a554: 1000 MOVA T, @0x0
00a555: 7881 MOV *XAR1++, AR0
00a556: 7F04 MOV @0x4, AR7
00a557: 7580 SUB *XAR0++, AH
00a558: 0004 PUSH RPC
00a559: 7C80 MOV *XAR0++, AR4
00a55a: 7F04 MOV @0x4, AR7
00a55b: 75C0 SUB *+XAR0[0], AH
196 GpioDataRegs.GPACLEAR.bit.GPIO12 = 1;
00a55c: 0272 MOVB ACC, #114
00a55d: 798E MOV *--XAR6, AR1
00a55e: 0000 ITRAP0
00a55f: 7FA0 MOV @AR0, AR7
00a560: 0000 ITRAP0
00a561: 7FA0 MOV @AR0, AR7
00a562: 0000 ITRAP0
00a563: 7FA0 MOV @AR0, AR7
198 case 1:
C$L6:
00a564: 0000 ITRAP0
00a565: 7841 MOV *-SP[1], AR0
00a566: 7F02 MOV @0x2, AR7
00a567: 7580 SUB *XAR0++, AH
00a568: 0400 SUB ACC, @0x0 << 16
00a569: 7881 MOV *XAR1++, AR0
00a56a: 0004 PUSH RPC
00a56b: 7C80 MOV *XAR0++, AR4
00a56c: 7F02 MOV @0x2, AR7
00a56d: 75C0 SUB *+XAR0[0], AH
199 GpioDataRegs.GPASET.bit.GPIO10 = 1;
00a56e: 0000 ITRAP0
00a56f: 7841 MOV *-SP[1], AR0
00a570: 08007881 ADD @0x0, #30849
00a572: 7F04 MOV @0x4, AR7
00a573: 7580 SUB *XAR0++, AH
00a574: 0004 PUSH RPC
00a575: 7C80 MOV *XAR0++, AR4
00a576: 7F04 MOV @0x4, AR7
00a577: 75C0 SUB *+XAR0[0], AH
200 GpioDataRegs.GPACLEAR.bit.GPIO11 = 1;
00a578: 0000 ITRAP0
00a579: 7841 MOV *-SP[1], AR0
00a57a: 1000 MOVA T, @0x0
00a57b: 7881 MOV *XAR1++, AR0
00a57c: 7F04 MOV @0x4, AR7
00a57d: 7580 SUB *XAR0++, AH
00a57e: 0004 PUSH RPC
00a57f: 7C80 MOV *XAR0++, AR4
00a580: 7F04 MOV @0x4, AR7
00a581: 75C0 SUB *+XAR0[0], AH
201 GpioDataRegs.GPACLEAR.bit.GPIO12 = 1;
00a582: 024C MOVB ACC, #76
00a583: 798E MOV *--XAR6, AR1
00a584: 0000 ITRAP0
00a585: 7FA0 MOV @AR0, AR7
00a586: 0000 ITRAP0
00a587: 7FA0 MOV @AR0, AR7
00a588: 0000 ITRAP0
00a589: 7FA0 MOV @AR0, AR7
203 case 2:
C$L7:
00a58a: 0000 ITRAP0
00a58b: 7841 MOV *-SP[1], AR0
00a58c: 7F04 MOV @0x4, AR7
00a58d: 7580 SUB *XAR0++, AH
00a58e: 0400 SUB ACC, @0x0 << 16
00a58f: 7881 MOV *XAR1++, AR0
00a590: 0004 PUSH RPC
00a591: 7C80 MOV *XAR0++, AR4
00a592: 7F04 MOV @0x4, AR7
00a593: 75C0 SUB *+XAR0[0], AH
204 GpioDataRegs.GPACLEAR.bit.GPIO10 = 1;
00a594: 0000 ITRAP0
00a595: 7841 MOV *-SP[1], AR0
00a596: 08007881 ADD @0x0, #30849
00a598: 7F02 MOV @0x2, AR7
00a599: 7580 SUB *XAR0++, AH
00a59a: 0004 PUSH RPC
00a59b: 7C80 MOV *XAR0++, AR4
00a59c: 7F02 MOV @0x2, AR7
00a59d: 75C0 SUB *+XAR0[0], AH
205 GpioDataRegs.GPASET.bit.GPIO11 = 1;
00a59e: 0000 ITRAP0
00a59f: 7841 MOV *-SP[1], AR0
00a5a0: 1000 MOVA T, @0x0
00a5a1: 7881 MOV *XAR1++, AR0
00a5a2: 7F04 MOV @0x4, AR7
00a5a3: 7580 SUB *XAR0++, AH
00a5a4: 0004 PUSH RPC
00a5a5: 7C80 MOV *XAR0++, AR4
00a5a6: 7F04 MOV @0x4, AR7
00a5a7: 75C0 SUB *+XAR0[0], AH
207
00a5a8: 0226 MOVB ACC, #38
00a5a9: 798E MOV *--XAR6, AR1
00a5aa: 0000 ITRAP0
00a5ab: 7FA0 MOV @AR0, AR7
00a5ac: 0000 ITRAP0
00a5ad: 7FA0 MOV @AR0, AR7
00a5ae: 0000 ITRAP0
00a5af: 7FA0 MOV @AR0, AR7
209 case 3:
C$L8:
00a5b0: 0000 ITRAP0
00a5b1: 7841 MOV *-SP[1], AR0
00a5b2: 7F02 MOV @0x2, AR7
00a5b3: 7580 SUB *XAR0++, AH
00a5b4: 0400 SUB ACC, @0x0 << 16
00a5b5: 7881 MOV *XAR1++, AR0
00a5b6: 0004 PUSH RPC
00a5b7: 7C80 MOV *XAR0++, AR4
00a5b8: 7F02 MOV @0x2, AR7
00a5b9: 75C0 SUB *+XAR0[0], AH
210 GpioDataRegs.GPASET.bit.GPIO10 = 1;
00a5ba: 0000 ITRAP0
00a5bb: 7841 MOV *-SP[1], AR0
00a5bc: 08007881 ADD @0x0, #30849
00a5be: 7F02 MOV @0x2, AR7
00a5bf: 7580 SUB *XAR0++, AH
00a5c0: 0004 PUSH RPC
00a5c1: 7C80 MOV *XAR0++, AR4
00a5c2: 7F02 MOV @0x2, AR7
00a5c3: 75C0 SUB *+XAR0[0], AH
211 GpioDataRegs.GPASET.bit.GPIO11 = 1;
00a5c4: 0000 ITRAP0
00a5c5: 7841 MOV *-SP[1], AR0
00a5c6: 1000 MOVA T, @0x0
00a5c7: 7881 MOV *XAR1++, AR0
00a5c8: 7F04 MOV @0x4, AR7
00a5c9: 7580 SUB *XAR0++, AH
00a5ca: 0004 PUSH RPC
00a5cb: 7C80 MOV *XAR0++, AR4
00a5cc: 7F04 MOV @0x4, AR7
00a5cd: 75C0 SUB *+XAR0[0], AH
212 GpioDataRegs.GPACLEAR.bit.GPIO12 = 1;
00a5ce: 0200 MOVB ACC, #0
00a5cf: 798E MOV *--XAR6, AR1
00a5d0: 0000 ITRAP0
00a5d1: 7FA0 MOV @AR0, AR7
00a5d2: 0000 ITRAP0
00a5d3: 7FA0 MOV @AR0, AR7
00a5d4: 0000 ITRAP0
00a5d5: 7FA0 MOV @AR0, AR7
214 case 4:
C$L9:
00a5d6: 0000 ITRAP0
00a5d7: 7841 MOV *-SP[1], AR0
00a5d8: 7F04 MOV @0x4, AR7
00a5d9: 7580 SUB *XAR0++, AH
00a5da: 0400 SUB ACC, @0x0 << 16
00a5db: 7881 MOV *XAR1++, AR0
00a5dc: 0004 PUSH RPC
00a5dd: 7C80 MOV *XAR0++, AR4
00a5de: 7F04 MOV @0x4, AR7
00a5df: 75C0 SUB *+XAR0[0], AH
215 GpioDataRegs.GPACLEAR.bit.GPIO10 = 1;
00a5e0: 0000 ITRAP0
00a5e1: 7841 MOV *-SP[1], AR0
00a5e2: 08007881 ADD @0x0, #30849
00a5e4: 7F04 MOV @0x4, AR7
00a5e5: 7580 SUB *XAR0++, AH
00a5e6: 0004 PUSH RPC
00a5e7: 7C80 MOV *XAR0++, AR4
00a5e8: 7F04 MOV @0x4, AR7
00a5e9: 75C0 SUB *+XAR0[0], AH
216 GpioDataRegs.GPACLEAR.bit.GPIO11 = 1;
00a5ea: 0000 ITRAP0
00a5eb: 7841 MOV *-SP[1], AR0
00a5ec: 1000 MOVA T, @0x0
00a5ed: 7881 MOV *XAR1++, AR0
00a5ee: 7F02 MOV @0x2, AR7
00a5ef: 7580 SUB *XAR0++, AH
00a5f0: 0004 PUSH RPC
00a5f1: 7C80 MOV *XAR0++, AR4
00a5f2: 7F02 MOV @0x2, AR7
00a5f3: 75C0 SUB *+XAR0[0], AH
217 GpioDataRegs.GPASET.bit.GPIO12 = 1;
00a5f4: 01DA SUBU ACC, *+XAR2[3]
00a5f5: 798E MOV *--XAR6, AR1
00a5f6: 0000 ITRAP0
00a5f7: 7FA0 MOV @AR0, AR7
00a5f8: 0000 ITRAP0
00a5f9: 7FA0 MOV @AR0, AR7
00a5fa: 0000 ITRAP0
00a5fb: 7FA0 MOV @AR0, AR7
219 case 5:
C$L10:
00a5fc: 0000 ITRAP0
00a5fd: 7841 MOV *-SP[1], AR0
00a5fe: 7F02 MOV @0x2, AR7
00a5ff: 7580 SUB *XAR0++, AH
00a600: 0400 SUB ACC, @0x0 << 16
00a601: 7881 MOV *XAR1++, AR0
00a602: 0004 PUSH RPC
00a603: 7C80 MOV *XAR0++, AR4
00a604: 7F02 MOV @0x2, AR7
00a605: 75C0 SUB *+XAR0[0], AH
220 GpioDataRegs.GPASET.bit.GPIO10 = 1;
00a606: 0000 ITRAP0
00a607: 7841 MOV *-SP[1], AR0
00a608: 08007881 ADD @0x0, #30849
00a60a: 7F04 MOV @0x4, AR7
00a60b: 7580 SUB *XAR0++, AH
00a60c: 0004 PUSH RPC
00a60d: 7C80 MOV *XAR0++, AR4
00a60e: 7F04 MOV @0x4, AR7
00a60f: 75C0 SUB *+XAR0[0], AH
221 GpioDataRegs.GPACLEAR.bit.GPIO11 = 1;
00a610: 0000 ITRAP0
00a611: 7841 MOV *-SP[1], AR0
00a612: 1000 MOVA T, @0x0
00a613: 7881 MOV *XAR1++, AR0
00a614: 7F02 MOV @0x2, AR7
00a615: 7580 SUB *XAR0++, AH
00a616: 0004 PUSH RPC
00a617: 7C80 MOV *XAR0++, AR4
00a618: 7F02 MOV @0x2, AR7
00a619: 75C0 SUB *+XAR0[0], AH
222 GpioDataRegs.GPASET.bit.GPIO12 = 1;
00a61a: 01B4 SUBU ACC, *ARP4
00a61b: 798E MOV *--XAR6, AR1
00a61c: 0000 ITRAP0
00a61d: 7FA0 MOV @AR0, AR7
00a61e: 0000 ITRAP0
00a61f: 7FA0 MOV @AR0, AR7
00a620: 0000 ITRAP0
00a621: 7FA0 MOV @AR0, AR7
224 case 6:
C$L11:
00a622: 0000 ITRAP0
00a623: 7841 MOV *-SP[1], AR0
00a624: 7F04 MOV @0x4, AR7
00a625: 7580 SUB *XAR0++, AH
00a626: 0400 SUB ACC, @0x0 << 16
00a627: 7881 MOV *XAR1++, AR0
00a628: 0004 PUSH RPC
00a629: 7C80 MOV *XAR0++, AR4
00a62a: 7F04 MOV @0x4, AR7
00a62b: 75C0 SUB *+XAR0[0], AH
225 GpioDataRegs.GPACLEAR.bit.GPIO10 = 1;
00a62c: 0000 ITRAP0
00a62d: 7841 MOV *-SP[1], AR0
00a62e: 08007881 ADD @0x0, #30849
00a630: 7F02 MOV @0x2, AR7
00a631: 7580 SUB *XAR0++, AH
00a632: 0004 PUSH RPC
00a633: 7C80 MOV *XAR0++, AR4
00a634: 7F02 MOV @0x2, AR7
00a635: 75C0 SUB *+XAR0[0], AH
226 GpioDataRegs.GPASET.bit.GPIO11 = 1;
00a636: 0000 ITRAP0
00a637: 7841 MOV *-SP[1], AR0
00a638: 1000 MOVA T, @0x0
00a639: 7881 MOV *XAR1++, AR0
00a63a: 7F02 MOV @0x2, AR7
00a63b: 7580 SUB *XAR0++, AH
00a63c: 0004 PUSH RPC
00a63d: 7C80 MOV *XAR0++, AR4
00a63e: 7F02 MOV @0x2, AR7
00a63f: 75C0 SUB *+XAR0[0], AH
227 GpioDataRegs.GPASET.bit.GPIO12 = 1;
00a640: 018E SUBU ACC, *--XAR6
00a641: 798E MOV *--XAR6, AR1
00a642: 0000 ITRAP0
00a643: 7FA0 MOV @AR0, AR7
00a644: 0000 ITRAP0
00a645: 7FA0 MOV @AR0, AR7
00a646: 0000 ITRAP0
00a647: 7FA0 MOV @AR0, AR7
229 case 7:
C$L12:
00a648: 0000 ITRAP0
00a649: 7841 MOV *-SP[1], AR0
00a64a: 7F02 MOV @0x2, AR7
00a64b: 7580 SUB *XAR0++, AH
00a64c: 0400 SUB ACC, @0x0 << 16
00a64d: 7881 MOV *XAR1++, AR0
00a64e: 0004 PUSH RPC
00a64f: 7C80 MOV *XAR0++, AR4
00a650: 7F02 MOV @0x2, AR7
00a651: 75C0 SUB *+XAR0[0], AH
230 GpioDataRegs.GPASET.bit.GPIO10 = 1;
00a652: 0000 ITRAP0
00a653: 7841 MOV *-SP[1], AR0
00a654: 08007881 ADD @0x0, #30849
00a656: 7F02 MOV @0x2, AR7
00a657: 7580 SUB *XAR0++, AH
00a658: 0004 PUSH RPC
00a659: 7C80 MOV *XAR0++, AR4
00a65a: 7F02 MOV @0x2, AR7
00a65b: 75C0 SUB *+XAR0[0], AH
231 GpioDataRegs.GPASET.bit.GPIO11 = 1;
00a65c: 0000 ITRAP0
00a65d: 7841 MOV *-SP[1], AR0
00a65e: 1000 MOVA T, @0x0
00a65f: 7881 MOV *XAR1++, AR0
00a660: 7F02 MOV @0x2, AR7
00a661: 7580 SUB *XAR0++, AH
00a662: 0004 PUSH RPC
00a663: 7C80 MOV *XAR0++, AR4
00a664: 7F02 MOV @0x2, AR7
00a665: 75C0 SUB *+XAR0[0], AH
232 GpioDataRegs.GPASET.bit.GPIO12 = 1;
00a666: 0168 SUBU ACC, *-SP[40]
00a667: 798E MOV *--XAR6, AR1
00a668: 0000 ITRAP0
00a669: 7FA0 MOV @AR0, AR7
00a66a: 0000 ITRAP0
00a66b: 7FA0 MOV @AR0, AR7
00a66c: 0000 ITRAP0
00a66d: 7FA0 MOV @AR0, AR7
Hi Hardy,
The assembly shown here is c28x assembly not CLA. I suspect you copied this from the disassembly window while the c28x debug tap was selected. the debugger window will try to interpret the CLA opcodes in terms of c28x assembly mnemonics; that is why there are so many ITRAPs in the code.
you need to have the CLA tap selected when you copy the code from the disassembly window.
switch case statements will result in bloated code on the CLA. The CLA is primarily geared towards sequential computation code- its not very efficient where logic is concerned. So switch-case and if-else statemens require the use of MBCNDD which will look like this
<I4> ;| last insturction that can change flags to affect branch
MNOP ;|-3 MNOP ;|-2 MNOP ;|-1 MBCNDD MNOP ;|+1 MNOP ;|+2 MNOP ;|+3
I4 is the last instruction that can alter the course of the branch by changing a flag. The 3 instructions immediately before and after the MBCNDD will run; here i have showed them as MNOPs but with optimization turned on the compiler might be able to fill these slots with some useful instruction. But everytime you have a decision in code (if-else, switch) you will encounter a structure like this.
Another place of inefficiency is using bit fields
Hardy Zhou said:GpioDataRegs.GPACLEAR.bit.GPIO10 = 1;
GpioDataRegs.GPACLEAR.bit.GPIO11 = 1;
GpioDataRegs.GPACLEAR.bit.GPIO12 = 1;
requires the CLA to read the register, mask off the desired bit field, OR a shifted 1, and then write back to the register. If you are going to be writing to different bitfields of the same register - i suggest writing to the whole register instead
GpioDataRegs.GPACLEAR.all |= (7 << 10);