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TMS320F28034: Shunt ADC timing for ePWM up/down mode

Part Number: TMS320F28034
Other Parts Discussed in Thread: CONTROLSUITE

Running a board with a F28034 for controlling a 3-phase inverter using the first three ePWM modules.  In addition the ADCs are monitoring the voltages and currents.  The output duty cycles are computed and set at the rate of the carrier frequency.  The inverter is running properly with a motor but because of the current sense being run through shunts it cannot read current with a pure resistive load.  I believe the problem is with timing of the ADC reading.  The pwms are in up/down (symmetrical) mode, which may be the case.  So far the pwm starts the ADC conversion which than triggers the interrupt routine.  My question is how do I go about changing the SOC of the ADC to be centered on the up/down?  Should point out that I'm not using any OS e.g. RTOS, using part of the latest ControlSuite, using CCS 6.1, custom board (nothing of TI design), pwms need to stay in symmetrical mode.  Before you ask, there's no problem with EALLOW/EDIS.

  • Hi Cody,

    The source of your ADC Start Of Conversion pulse appears to be an ePWM module.  If so, then EPwm*Regs.ETSEL.bit.SOCASEL will allow you to choose how SOCA is generated. One option is to create a SoC pulse when the ePWM module reaches Zero or PRD.  The definition chosen should match with the definition of your PWMs such that it is the center of the on-time of your shunts.  This should resolve your problem.

    (then via the ADCSOCxCTL.TRIGSEL register bits, you can choose individual channels to use the ePWM*'s ADCSOCA/B as a trigger source)

    (theoretically, you could do better than using ZRO/PRD and generate SoCs that enable the ADC's samples to better match the center of the on-time.  You'd do this by utilizing CMPB (and/or an usused ePWM) and placing it to create an SoC near PRD or ZRO, but not exactly.  You'd set CMPB such that such that the Acquisition Window of the ADC is respected and so that the center of the acquisition window matches the PWM's minimum on-time)

    Hopefully this helps!


    Thank you,
    Brett

  • Forgot to mention that the gates are active low, so I have it set to active low complementary. It doesn't look like polarity matters here as it's kept hidden inside the ePWM module. Other modules just know that the PWM is active at that time. Yes the ADC SOC is set to ePWM 1.

    I tried running with SOCASEL set to '3', which triggers on either PRD or zero. No change. I verified through the watch window that it's keeping the value. Other sampled values are still read correctly, leaving just the current reading zero when my meter displays 3A. I know the circuit works as a motor will display correct values.
  • Hi Cody,

    Even though your PWM uses the dead-band submodule and active-low complementary mode, you should still be able to get the ADC SoC pulse aligned where you want it.

    For further debugging, my next recommendation would be to use the GPIO mux to output ADCSOCAO and/or ADCSOCBO.  As seen in Figure 1 of the ePWM User's Guide, ADCSOCAO is defined as the OR of ePWM1's SOCA, ePWM2's SOCA, etc.  This should allow you to define whether the SoC is being positioned as you think it is - which will allow you to know whether the issue is in the SoC configuration or something to do with the ADC.

    (remember that the ADC SoC is a pulse - the acquisition window then follows it)


    Thank you,
    Brett