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TMS320F28375D: bit reversed addressing and Q15 format for vcuII fft usage

Part Number: TMS320F28375D
Other Parts Discussed in Thread: CONTROLSUITE

Dear TI,

     Using spruhs1a and c28x-vcu-lib-ug.pdf it's not 100% clear.

     In the code comments I see reference to the the data buffers needing to be in Q15 format, and I see reference to bit reversed addressing.

I infer the following:

-  we must align the memory of the input buffer as per the 2x the size of the CFFT function chosen

- we don't explicit need to rearrange our data, or call a function to rearrange our data (if we are using the VCUII)  prior to calling the chosen FFT function (complex FFT in my case), the bit reversed addressing is 'built into' the addressing mode which is why the special alignment above is necessary for it to work.  ie: bit reversed addressing is 'hidden' to the caller of the function as long as the buffer is aligned as above.

-  I infer I MUST scale my data to Q15 format, so my complex number is +-1.0 +/- I*1.0 maximum...  represented in Q15 format,

Thanks for confirming if I'm reading the above correctly from the documentation.

  • Hi Rob,

    The VCU FFT expert is currently out of office so his response will be a little delayed.

    In the meantime, on the F2837xD I would suggest looking at the FPU32 (single-precision floating point) FFT over the VCU FFT. The VCU is limited to 16-bit fixed-point resolution. The resolution would be much better using the FPU32 library instead.

    Take a look in C:\ti\controlSUITE\libs\dsp\FPU. If there is a reason you would like to stick with the VCU instead, I would like to understand the reasoning.

    Regards
    Lori
  • Rob,

    Sorry for the delay in responding. 

    Rob Barton said:
    -  we must align the memory of the input buffer as per the 2x the size of the CFFT function chosen

    Correct

    Rob Barton said:
    - we don't explicit need to rearrange our data, or call a function to rearrange our data (if we are using the VCUII)  prior to calling the chosen FFT function (complex FFT in my case), the bit reversed addressing is 'built into' the addressing mode which is why the special alignment above is necessary for it to work.  ie: bit reversed addressing is 'hidden' to the caller of the function as long as the buffer is aligned as above.

    Correct. stage 1 reads the inputs in bit reversed format so only the input buffer need be aligned to a 2N word boundary.

    Rob Barton said:
    -  I infer I MUST scale my data to Q15 format, so my complex number is +-1.0 +/- I*1.0 maximum...  represented in Q15 format,

    Yes that is correct.

  • Hi Rob - I wanted to follow-up and see if you decided to use the VCU or the FPU32 ?


    Regards

    Lori

  • We are currently testing with the FPU, as to convert to fixed point we will need to appropriately address the scaling of the signals to account for the dynamic range offered by the fixed point format.  So we are still considering using the VCU since we really need fast FFTs.  We are aware of the tradeoffs but we essentially need to perform fast FFTs, lots of them, and at high data rates.

    So it's still a consideration.

  • Thank you for the information Rob!

    From a device-to-device compatibility standpoint the FPU32 will be on more C2000 devices than the VCU. That may be another consideration.

    Regards
    Lori