Hi Team,
Had a question come up recently regarding clearing the FIFO. Are there any special circumstances to consider when clearing the FIFO buffer? The logic is as follows:
C2000 is slave i2c device. When master sends read command, C2000 checks FIFO buffer and if not zero, clears it. This is to prevent any leftover information from being transmitted accidentally.
I didn't see much in the TRM regarding details on the FIFO buffer and also didn't find anything in the errata, but just wanted to be sure.
Thanks,