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TMS320F28069: Configure ePWM for a timer period greater than 16 bits

MEGHANA MANAVAZHI
Genius 10015 points
Part Number: TMS320F28069
Other Parts Discussed in Thread: CONTROLSUITE

hi ,

I was looking at an example code / code snippet that could help me configure the ePWM in F28069.

i am looking at providing an input period that is greater than 16 bits .

This makes it difficult to directly write the whole period to the TBPRD register as it would truncate it to 16 bits .

i believe that i would need to use the TBPRDM register if i have to configure for 24 bits period ? is that correct ?

i have used the code below . Am i missing something ?

EPWM_REGS  is as defined in the F2806x_Epwm.h (C:\ti\controlSUITE\device_support\f2806x\v151\F2806x_headers\include)

volatile struct EPWM_REGS *pepwm;

  pepwm->TBPRDM.half.TBPRDHR = temp && 0x000000FF;
  pepwm->TBPRDM.half.TBPRD = (temp >> 8) & 0x0000FFFF;

Are there any other registers that need to be configured ?

The LSB 8 bits are in the TBPRDHR and the bits 24 to 8 are in TBPRD . is this the right way to do it ??

Need these details to configure some upper level details for a customer ...

Thanks .

Regards .

  • 0
    TI__Genius 15260 points
    Hello,

    Can you clarify your question a bit more? The title makes it sound like you need a period longer than the 16 bits can provide, but the question seems to be about using the high resolution feature.

    Thanks,
    Kris
  • 0 in reply to Kris Parrent
    TI__Genius 10015 points

    hi Kris ,

    Yes the real intention is to be able to provide a period greater than 16 bits using the epwm timer module.

    From the TRM it is unclear of the configurations needed for the same .

    The only reference i see is of the registers that i have provided in the first mail .

    Regards .

  • 0 in reply to MEGHANA MANAVAZHI
    TI__Genius 15260 points

    We do not have a way to change the size of the TBPRD register, but if you are looking for a slower frequency the EPWM Time Base Clock (TBCLK) can be divided down to reduce the clock rate of the EPWM. Will that work for your application? 

  • 0 in reply to Kris Parrent
    TI__Genius 10015 points
    hi Kris,

    Actually , we are already using the Epwm6 timer to generate a timeout which is being done using a 16bit period .
    Now i am trying to increase this as we have a chance of getting about say 5 sec ie 5000000 us ( as the period is a value in us ) which is > 16 bit .
    This would limit me to generating only 65535 ie , 0.065 sec which may not suffice for the application ...

    Could i not use these 2 registers below ..?
    The TBPRDHR holding lower 8 bits and the upper say 16 bits ( 24 bit total period) is stored in TBPRD ???

    pepwm->TBPRDHR = (temp <<8) && 0xFF00;
    pepwm->TBPRD = (temp >> 8) && 0xFFFF;

    Regards .
  • 0 in reply to MEGHANA MANAVAZHI
    Guru 14640 points
    Reference: processors.wiki.ti.com/.../C2000_Archived_Workshops
    Take a look at the multi-day workshop for the F28069, chapter 7 - lots of detail on PWMs, and also the HRPWM, which looks like it might be a fit for what you are doing.
  • 0 in reply to Todd Anderson78572
    TI__Genius 15260 points

    Great reference material.

    The TBPRDHR register is for high resolution PWM usage. It does not add to the total period size, but when the PWM is configured for high resolution mode, it adds finer granularity within the existing 16 bits of the TBPRD.

    Please have a look at the CLKDIV and HSPCLKDIV bits of the TBCTL register.  You can find the details in the TRM that I linked to below on page 334.  Essentially, you'll want to decrease the TBCLK to a frequency slow enough that you hit the targeted 5 seconds with 16 bits.

    www.ti.com/.../spruh18f.pdf