LAUNCHXL-F28377S: Weird spikes caused by the EPWM at low Periods

Hi Mario,

Is your SYSCLK or your EPWMCLK 200 MHz?  While the system can run at 200 MHz, keep in mind the PWM is limited to 100 MHz.  There is a register called EPWMCLKDIV which must be set to divide by 2 if your SYSCLK is 200 MHz.

EDIT: I see in your code you have EPWMCLKDIV = 1 so the PWM should be running at 100 MHz which is good.  Do you do any additional configuration for your ePWM or is that the entire initialization code?  Can you show us the values of the EPWM registers in the Registers View of CCS when the problem is occurring?

Which ePWM is this? Do you have any sync sources enabled?

Regards,

Kris

Hi Kris!

Thanks for your reply. I do use other (synced) EPWMs as well. However even if i disable everything I still encounter the same problem.

Therefore if have written a program that only sets the Clock and initializes Epwm6 including its GPIOs. Here is the full code:

#include "F28x_Project.h"

void InitEpwm6();

void main(void)
{
	InitSysCtrl();		// PLL, WatchDog, enable Peripheral Clocks. Function Found in F2837xS_SysCtrl.c



	InitEpwm6();
	InitEPwm6Gpio();	// Found in F2837xS_EPwm.c

	for(;;)
	{

	}
}

void InitEpwm6()
{
	EALLOW;
	ClkCfgRegs.PERCLKDIVSEL.bit.EPWMCLKDIV  = 0x1;
	CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 0x0;
	EDIS;

	EPwm6Regs.TBCTL.bit.CTRMODE = 	0; 		// Count up
	EPwm6Regs.TBPRD = 16;	// Timer Period

	EPwm6Regs.CMPA.bit.CMPA = 4;
	EPwm6Regs.AQCTLA.bit.CAU = AQ_SET;		// switch to HIGH

	EPwm6Regs.CMPB.bit.CMPB = 10;
	EPwm6Regs.AQCTLA.bit.CBU = AQ_CLEAR;	// switch to LOW

    EALLOW;
    CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 0x1;	// Start EPWM
    EDIS;
}

// set CPU clock to 200MHz -3%
InitClock()
{
	EALLOW;
	ClkCfgRegs.CLKSRCCTL1.bit.OSCCLKSRCSEL=	0x0; 	//  select INTOSC2 as clock source. Note doing this resets FMULT and IMULT to 0
	ClkCfgRegs.SYSCLKDIVSEL.all= 			0x4;	//  set Clock-Divider to a lower initial Frequency

	ClkCfgRegs.SYSPLLMULT.all |= 			0x326; 	// set clock-multiplier
	while(ClkCfgRegs.SYSPLLSTS.bit.LOCKS != 1) { } 	// wait for SYSCLK to spool up

	//repeat to ensure PLL is locked
	ClkCfgRegs.SYSPLLMULT.all |= 			0x326;
	while(ClkCfgRegs.SYSPLLSTS.bit.LOCKS != 1) { }


	ClkCfgRegs.SYSPLLCTL1.bit.PLLCLKEN = 	1;		//  connect PLL outputclock (PLLRAWCLK) to system

	ClkCfgRegs.SYSCLKDIVSEL.all = 			1; 		// final clock divider

	ClkCfgRegs.LOSPCP.all = 				0x1;	//  Low Speed Clock for SPI and SCI. LSPCLK = SYSCLK/( value+1 )
	EDIS;
}

When i launch the program my scope shows the following result (i am sorry for the cellphone images but my scope cant access my USB-Stick) :

Here are the exported values fromt the CCS6 Registers-Tab:

R EPwm6Regs_TBCTL 0x0000000F 0x0080
R EPwm6Regs_TBCTL2 0x0000000F 0x0000
R EPwm6Regs_TBCTR 0x0000000F 0x000B
R EPwm6Regs_TBSTS 0x0000000F 0x0003
R EPwm6Regs_CMPCTL 0x0000000F 0x0000
R EPwm6Regs_CMPCTL2 0x0000000F 0x0000
R EPwm6Regs_DBCTL 0x0000000F 0x0000
R EPwm6Regs_DBCTL2 0x0000000F 0x0000
R EPwm6Regs_AQCTL 0x0000000F 0x0000
R EPwm6Regs_AQTSRCSEL 0x0000000F 0x0000
R EPwm6Regs_PCCTL 0x0000000F 0x0000
R EPwm6Regs_HRCNFG 0x0000000F 0x0000
R EPwm6Regs_HRPWR 0x0000000F 0x0000
R EPwm6Regs_HRMSTEP 0x0000000F 0x0000
R EPwm6Regs_HRCNFG2 0x0000000F 0x0000
R EPwm6Regs_HRPCTL 0x0000000F 0x0000
R EPwm6Regs_GLDCTL 0x0000000F 0x0000
R EPwm6Regs_GLDCFG 0x0000000F 0x0000
R EPwm6Regs_EPWMXLINK 0x0000000B 0x50055555
R EPwm6Regs_AQCTLA 0x0000000F 0x0120
R EPwm6Regs_AQCTLA2 0x0000000F 0x0000
R EPwm6Regs_AQCTLB 0x0000000F 0x0000
R EPwm6Regs_AQCTLB2 0x0000000F 0x0000
R EPwm6Regs_AQSFRC 0x0000000F 0x0000
R EPwm6Regs_AQCSFRC 0x0000000F 0x0000
R EPwm6Regs_DBREDHR 0x0000000F 0x0000
R EPwm6Regs_DBRED 0x0000000F 0x0000
R EPwm6Regs_DBFEDHR 0x0000000F 0x0000
R EPwm6Regs_DBFED 0x0000000F 0x0000
R EPwm6Regs_TBPHS 0x0000000B 0x00000000
R EPwm6Regs_TBPRDHR 0x0000000F 0x0000
R EPwm6Regs_TBPRD 0x0000000F 0x0010
R EPwm6Regs_CMPA 0x0000000B 0x00040000
R EPwm6Regs_CMPB 0x0000000B 0x000A0000
R EPwm6Regs_CMPC 0x0000000F 0x0000
R EPwm6Regs_CMPD 0x0000000F 0x0000
R EPwm6Regs_GLDCTL2 0x0000000F 0x0000
R EPwm6Regs_TZSEL 0x0000000F 0x0000
R EPwm6Regs_TZDCSEL 0x0000000F 0x0000
R EPwm6Regs_TZCTL 0x0000000F 0x0000
R EPwm6Regs_TZCTL2 0x0000000F 0x0000
R EPwm6Regs_TZCTLDCA 0x0000000F 0x0000
R EPwm6Regs_TZCTLDCB 0x0000000F 0x0000
R EPwm6Regs_TZEINT 0x0000000F 0x0000
R EPwm6Regs_TZFLG 0x0000000F 0x0000
R EPwm6Regs_TZCBCFLG 0x0000000F 0x0000
R EPwm6Regs_TZOSTFLG 0x0000000F 0x0000
R EPwm6Regs_TZCLR 0x0000000F 0x0000
R EPwm6Regs_TZCBCCLR 0x0000000F 0x0000
R EPwm6Regs_TZOSTCLR 0x0000000F 0x0000
R EPwm6Regs_TZFRC 0x0000000F 0x0000
R EPwm6Regs_ETSEL 0x0000000F 0x0000
R EPwm6Regs_ETPS 0x0000000F 0x0000
R EPwm6Regs_ETFLG 0x0000000F 0x0000
R EPwm6Regs_ETCLR 0x0000000F 0x0000
R EPwm6Regs_ETFRC 0x0000000F 0x0000
R EPwm6Regs_ETINTPS 0x0000000F 0x0000
R EPwm6Regs_ETSOCPS 0x0000000F 0x0000
R EPwm6Regs_ETCNTINITCTL 0x0000000F 0x0000
R EPwm6Regs_ETCNTINIT 0x0000000F 0x0000
R EPwm6Regs_DCTRIPSEL 0x0000000F 0x0000
R EPwm6Regs_DCACTL 0x0000000F 0x0000
R EPwm6Regs_DCBCTL 0x0000000F 0x0000
R EPwm6Regs_DCFCTL 0x0000000F 0x0000
R EPwm6Regs_DCCAPCTL 0x0000000F 0x0000
R EPwm6Regs_DCFOFFSET 0x0000000F 0x0000
R EPwm6Regs_DCFOFFSETCNT 0x0000000F 0x0000
R EPwm6Regs_DCFWINDOW 0x0000000F 0x0000
R EPwm6Regs_DCFWINDOWCNT 0x0000000F 0x0000
R EPwm6Regs_DCCAP 0x0000000F 0x0000
R EPwm6Regs_DCAHTRIPSEL 0x0000000F 0x0000
R EPwm6Regs_DCALTRIPSEL 0x0000000F 0x0000
R EPwm6Regs_DCBHTRIPSEL 0x0000000F 0x0000
R EPwm6Regs_DCBLTRIPSEL 0x0000000F 0x0000

Hello again!

Thank you for your suggestion. I have tried using several different dividers but unfortunately it has no effect.

TBPRD and TBCTR are 0 by default after reset and TBCTR is not changing until the initialization is complete and  CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1.

I know that my scope is pretty bad but I am certain that the spikes are not just noise. Also I am using the EPWM to trigger the conversion of an ADC and the spikes trigger the ADC additionally. Below is an image comparing EPWM2A (blue) with EPWM6A.

I migth have access to a different scope on monday where i can save the actual data on USB.

Also this is the promised zip-file of a simple project that should replicate the issue.

EPWM Glitch Test.zip

Best regards and thank you

Mario

Mario,

Thank you for the additional information and the code. I will run your project next week to see if that allows us to replicate the issue.

Regards,

Kris