TMS320F28335: SPI instruction length

Rohit,

The SPI is a general purpose communication module, meaning that it does not support any specific instruction/data formatting in hardware.

The SPI will hold the CS low as long as there is data to transmit. So if you need the CS low for 4 bytes (32 bits), you can set your word size to 8 bits, and write the 4 words to the FIFO. If you need to stage multiple consecutive transmissions, then you will need to wait until the previous transmission has completed before writing the next set of data to the FIFO.  You can alternately control the CS manually with a GPIO, but you will still need to follow the same recommendation as if just using the FIFO.

Does this make sense?

-Mark

Hi Mark, thank you for replying. I still do not have clarity on how to make this work. I can understand following settings:
1. The clock polarity is set to one of the four settings and the word size is set to 8 bits from SPICCR register.
2. Then, the baud rate is also selected from SPIBRR register.
However, what I do not understand is how to tell the processor that the message to be transferred has X number of words, so that it can hold Slave_enable LOW for that many words? Could you please give a description of how the following transfer would be done?
1. Write the one word message to first register of the transmit FIFO.
2. Transmit it
3. Write the three word message to first three registers of transmit FIFO
4. Transmit the three word message.

Rohit,

As long as there is data in the FIFO, the SPI will hold the Chip select signal low. Do you need to keep the Chip select low for the entire duration of the transmission? I glanced at the datasheet and it looks like the full instruction needs to be transmitted while the chip select is low. so you can just write your 4 words (1 word command + 3 word data) to the FIFO. If you let this completely transmit before writing the next command to the FIFO, the CSn signal will return to inactive (1).

-Mark

So if I am understanding it correct, the way to transfer a multi word instruction is:
1. Write all the words of the instruction to the FIFO (less than 16)
2. Initiate transmission
3. When FIFO is empty, refill the FIFO with the next instruction and repeat.
One more question is what command do I use to initiate transmission and what command do I use to read the data from the receive buffer? Also, when a multiword instruction is transmitted, how often and when is the receiver FIFO filled from the SPIDAT register? Is one register of the receive FIFO filled once a word has been trnasmitted and this keeps happening for all the words of the instruction?

Rohit,

Once the first word is written to SPITXBUF it is transferred to SPIDAT and begins transmitting. As you write additional words to SPITXBUF, the FIFO will fill appropriately, and the continue until there is no more data remaining in the FIFO. There is no special "START" command in the SPI.

You can read the received data using the SPIRXBUF register. The data is moved from SPIDAT to the SPIRXBUF automatically.

Please read through the SPI User Guide. All of this information is in there, and more. Here is the link: www.ti.com/.../sprueu3 There are also examples in controlSUITE to help you get acquainted with programming the SPI module. Run through these modules independently of your external memory chip in order to learn the module.

Regards,
Mark

Hi Mark,
I have read through the user guide a couple of times and I am asking these questions because the dataflow is not very clear to me. So you are saying that the instruction has to be written in the FIFO, or does it have to be written in the SPITXBUF? It seemed to me that you write data in TX FIFO and then it is transmitted through the transmitter?

Great! And of course I am happy to answer any of your questions.
The SPITXBUF is the register access to the FIFO.

The data flow is to SPITXBUF --> FIFO --> SPIDAT --> Pin (SOMI or SIMO depending on master/slave)
The other direction is Pin --> SPIDAT -->FIFO -->RXBUF

Thanks,
Mark

Hi Mark,

From the Figure 1-2 of the SPI manual, it seems that the flow is:

Pin -> SPIDAT -> SPIRXBUF -> FIFO

FIFO -> SPITXBUS -> SPIDAT -> Pin

I have attached a screenshot below, with the red boxes showing the buffer. Is my interpretation incorrect?

Rohit,

Yes, your understanding is correct. The SPIRXBUF and SPITXBUF are the user accessible location to their respective FIFOs. You can think of them as one and the same as far as coding your software. When the Value is automatically copied from the SPIDAT register to the SPIRXBUF (or the reverse for SPITXBUF), the data is placed in the FIFO as well.

Thanks,
Mark

I have one more question. I will explain with an example scenario.

1. Baud rate is 1 Mb/s
2. Word size is 16 bit
3. SPI is operated in polling mode at 5 kHz
4. Slave enable is controlled separately in software
5. FIFO is not enabled
6. For a multi word instruction, each word is put into the buffer every polling cycle. Slave Enable is held LOW for all this time.
6. Based on baud rate, the transmission time for one word is 16 us (16 bits at 1 Mb/s), which is far less than the 200 us polling time (5 kHz). So for a multi word instruction, if an entire word has been transmitted, does the SPI Clock stop toggling, so that there is no garbage transmission and the line remains idle till the next polling cycle (when the next word is loaded into the Tx buffer)? Please note that Slave Enable is still low as there are more words to be transmitted before the instruction is complete.

Rohit,

One of most important features of the SPI is that the clock stops when there is no transmission. If you only write one word to the buffer, it will transmit the data and then stop toggling the clock.

-Mark

I see. That is good to know. This means that if I am polling at a much slower rate than the baud rate, there is no risk of sending garbage data.

Thanks for the clarification