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TMS320F28335: SCIB RX Interrupt problem.

Part Number: TMS320F28335

I cannot get an interrupt on rx pin. The device TMS320F28335

Firstly I configure the pins

EALLOW;

GpioCtrlRegs.GPAPUD.bit.GPIO9 = 0;  // Enable pull-up for GPIO9  
   
GpioCtrlRegs.GPAPUD.bit.GPIO11 = 0;  // Enable pull-up for GPIO11 (SCIRXDB)

GpioCtrlRegs.GPAQSEL1.bit.GPIO11 = 3; // Asynch input GPIO11 (SCIRXDB)
GpioCtrlRegs.GPAMUX1.bit.GPIO9 = 2;  // Configure GPIO9 for SCITXDB operation

GpioCtrlRegs.GPAMUX1.bit.GPIO11 = 2; // Configure GPIO11 for SCIRXDB operation

EDIS;

Secondly I configure the registers

ScibRegs.SCICCR.all =0x0007;    // 1 stop bit, even parity, No loopback
	                         // No parity,8 char bits,
	                         // async mode, idle-line protocol

ScibRegs.SCICTL1.all =0x0003;   // enable TX, RX, internal SCICLK,
	                                   // Disable RX ERR, SLEEP, TXWAKE

ScibRegs.SCICTL2.bit.RXBKINTENA =1;

ScibRegs.SCIHBAUD = 0x0000;  
ScibRegs.SCILBAUD = SCI_PRD; 

SciaRegs.SCICCR.bit.LOOPBKENA = 0;
	 
ScibRegs.SCIFFTX.all=0xC021;

ScibRegs.SCIFFRX.all=0x0001; //size of buffer changed to 1 to avoid buffering in fifo and handle data immediately

 ScibRegs.SCIFFCT.all=0x00;

 ScibRegs.SCICTL1.all =0x0023;     // Relinquish SCI from Reset
 ScibRegs.SCIFFTX.bit.TXFIFOXRESET=1;
 ScibRegs.SCIFFRX.bit.RXFIFORESET=1;

And I enable interrupts

PieVectTable.SCIRXINTB = &scibRxFifoIsr;//Added For Fixing CPU UART
PieCtrlRegs.PIEIER9.bit.INTx3=1;  //SCIRXINTB
IER = 0x100;    // Enable CPU INT
EnableInterrupts(); // Enable Global Interrupts

And this is an interrupt routine.

interrupt void scibRxFifoIsr(void)
{
    //if (ScibRegs.SCIRXST.bit.RXRDY == 1)
    Uint8 chr = ScibRegs.SCIRXBUF.all;   // Read data

    ScibRegs.SCIFFRX.bit.RXFFOVRCLR=1;  // Clear Overflow flag
    ScibRegs.SCIFFRX.bit.RXFFINTCLR=1;  // Clear Interrupt flag
    PieCtrlRegs.PIEACK.all|=0x100;      // Issue PIE ack
}

I see on the scope packets coming to RX pin however the interrupt doesn’t occur.