First, this is what I would like to do:
I would like to connect external memory to the MCU using the XINTF. A 1Mb (64k x 16) ASRAM chip requires 16 address lines and 16 data lines. The F28335 XINTF has 20 address lines (XA0-XA19) and 32 data lines (XD0-XD31). So I was going to interface with the memory chip using XZCS7n, XWE0n, XRDn, XD0-XD15 and XA0-XA15.
Here is my problem: Four of these lines XA12, 13, 14 & 15 share the same pins as GPIO84, 85, 86 & 87, which are used to select the Bootloader Boot Mode.
Using the F28335 Development Kit Control Card as an example, the boot mode is chosen using switches to set these GPIO pins either high or low. However, if these pins are tied either high or low based on the mode selected, how can these same pins be used as XINTF address lines?
If these pins can be configured as either a GPIO or an XA, then does this mean that the Bootloader and XINTF cannot both be used?
Or are the XINTF address line numbers arbitrary and any XA lines can be used, as in they do not need to follow their designated sequence?
Can I skip XA12-XA15 and use only XA0-XA11 and XA16-XA19 to get my 16 required address lines?