Tool/software: Code Composer Studio
I am using TMS320F28027, and looks like the lowest clock frequency of the SPI can be achieved 33.48Khz (=60MHz/(14*128)) with 60MHz CPU CLK. lowest LSPCLK=SYSCLKOUT/14, lowest SPIBRR=LSPCLK/128.
Is it possible to reduce the SPIBRR even lower without lowering CPUCLK from 60MHz. Please comment !!