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Compiler/TMS320F28377D: How to split Cla1Prog1 in two RAM sections for standalone application

JFerCep-Ing
Intellectual 330 points

Part Number: TMS320F28377D

Tool/software: TI C/C++ Compiler

Hello,

I have a simple question. My CLA code doesn't fit into one RAM block:

  • Cla1Prog size = 0x9e8
  • RAMLS5 size = 0x800

And I want to split the section into RAMLS4 & RAMLS5, but if I have understood correctly what I'm reading I cannot do it using the LOAD, RUN, START, etc etc format

   Cla1Prog         : LOAD = FLASHD,
                      RUN = RAMLS4 | RAMLS5,
                      LOAD_START(_Cla1funcsLoadStart),
                      LOAD_END(_Cla1funcsLoadEnd),
                      RUN_START(_Cla1funcsRunStart),
                      LOAD_SIZE(_Cla1funcsLoadSize),
                      PAGE = 0, ALIGN(4)

The example above is trying to fit the whole block into RAMLS4 or RAMLS5, but is not splitting the section.

How can I do this?

Thank you

, 

 

  • 0
    TI__Mastermind 20850 points
    Hi Javier,

    You don't want to split it in the manner shown. You could do

    RUN >> RAMLS4 | RAMLS5

    but then you end up with two named sectioncs Cla1Prog.1 and Cla1Prog.2 and then the linker cant find "Cla1Prog" so it complains about not being able to generate the start, run and end variables. What you should do instead is to combine the memory definitions of RAMLS4 and LS5 into one

    RAMLS45 : origin = 0x...(start of LS4) , length = 0x...(length of LS4+5)

    and then assign the run location to this new memory

    In your setup code you will have to configure both RAMLS4, LS5 as CLA program space.