Part Number: TMS320F28377D
Hi,
customer will develop a 8-layer PCB for F28377D Delfino in QFP174 package.
He will use separate PCB layers for GND and for 3.3V.
By looking into DS, we found that approx 20 VDDIO pins needs a separate dedicated capacitor!
This is a problem because of pcb place constraints.
Q: Are there any of these caps to avoid, if connection VDDIO pin to GNB or 3,3V layers are as short as possibe and a 100nf cap for each side of the IC is provided ?
Any design hints to reduce amount of analog components welcome !